Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Receiver, transceiver SOIC 24

 

      

  

SCBS706F − AUGUST 1997 − REVISED OCTOBER 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Support Mixed-Mode Signal Operation

(5-V Input and Output Voltages With

3.3-V V

)

D Support Unregulated Battery Operation

Down to 2.7 V

D Typical V

OLP

(Output Ground Bounce)

<0.8 V at V

= 3.3 V, T

= 25°C

D I

off

and Power-Up 3-State Support Hot

Insertion

D Bus Hold on Data Inputs Eliminates the

Need for External Pullup/Pulldown

Resistors

D Latch-Up Performance Exceeds 500 mA Per

JESD 17

D ESD Protection Exceeds JESD 22

− 2000-V Human-Body Model (A114-A)

− 200-V Machine Model (A115-A)

CLKAB

SAB

OEAB

GND

CLKBA

SBA

OEBA

SN54LVTH652 ...JT OR W PACKAGE

SN74LVTH652 . . . DB, DGV, DW, NS, OR PW PACKAGE

(TOP VIEW)

OEAB

321

13 14

OEBA

15 16 17 18

GND

SAB

CLKAB

SN54LVTH652 . . . FK PACKAGE

(TOP VIEW)

28 27 26

CLKBA

SBA

NC − No internal connection

description/ordering information

These bus transceivers and registers are designed specifically for low-voltage (3.3-V) V

operation, but with

the capability to provide a TTL interface to a 5-V system environment.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE MARKING

SOIC − DW

Tube SN74LVTH652DW

LVTH652

SOIC − DW

Tape and reel SN74LVTH652DWR

LVTH652

SOP − NS Tape and reel SN74LVTH652NSR LVTH652

−40°C to 85°C

SSOP − DB Tape and reel SN74LVTH652DBR LXH652

−40 C to 85 C

TSSOP − PW

Tube SN74LVTH652PW

LXH652

TSSOP − PW

Tape and reel SN74LVTH652PWR

LXH652

TVSOP − DGV Tape and reel SN74LVTH652DGVR LXH652

CDIP − JT Tube SNJ54LVTH652JT SNJ54LVTH652JT

−55°C to 125°C

CFP − W Tube SNJ54LVTH652W SNJ54LVTH652W

−55 C to 125 C

LCCC − FK Tube SNJ54LVTH652FK SNJ54LVTH652FK

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Summary of content (18 pages)

PAGE 1
SCBS706F − AUGUST 1997 − REVISED OCTOBER 2003 D Support Mixed-Mode Signal Operation D D D D Bus Hold on Data Inputs Eliminates the (5-V Input and Output Voltages With 3.3-V VCC ) Support Unregulated Battery Operation Down to 2.7 V Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.
PAGE 2
SCBS706F − AUGUST 1997 − REVISED OCTOBER 2003 description/ordering information (continued) The ’LVTH652 devices consist of bus-transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. Output-enable (OEAB and OEBA) inputs are provided to control the transceiver functions.
PAGE 3
3 21 OEAB OEBA L L 1 23 2 CLKAB CLKBA SAB X X X BUS B BUS A BUS A BUS B SCBS706F − AUGUST 1997 − REVISED OCTOBER 2003 22 SBA L 3 21 OEAB OEBA H H 21 OEBA H X H 23 2 1 CLKAB CLKBA SAB ↑ X ↑ X ↑ ↑ X X X 2 SAB L 22 SBA X BUS B BUS A BUS A 3 OEAB X L L 23 CLKBA X REAL-TIME TRANSFER BUS A TO BUS B BUS B REAL-TIME TRANSFER BUS B TO BUS A 1 CLKAB X 22 3 21 1 23 2 22 SBA OEAB H OEBA L CLKAB C
PAGE 4
SCBS706F − AUGUST 1997 − REVISED OCTOBER 2003 logic diagram (positive logic) OEBA OEAB CLKBA SBA CLKAB SAB 21 3 23 22 1 2 One of Eight Channels 1D C1 A1 4 20 1D C1 To Seven Other Channels Pin numbers shown are for the DB, DGV, DW, JT, NS, PW, and W packages.
PAGE 5
SCBS706F − AUGUST 1997 − REVISED OCTOBER 2003 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 6
SCBS706F − AUGUST 1997 − REVISED OCTOBER 2003 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH VCC = 2.7 V, VCC = 2.7 V to 3.6 V, II = −18 mA IOH = −100 µA VCC = 2.7 V, IOH = −8 mA IOH = −24 mA VCC = 3 V VOL VCC = 3 V Ioff II(hold) A or B ports SN74LVTH652 TYP† MAX MIN −1.2 VCC−0.2 2.4 −1.2 2 0.2 0.2 IOL = 24 mA IOL = 16 mA 0.
PAGE 7
SCBS706F − AUGUST 1997 − REVISED OCTOBER 2003 timing requirements over recommended operating free-air temperature range (unless otherwise noted) (see Figure 2) SN54LVTH652 VCC = 3.3 V ± 0.3 V MIN fclock tw Clock frequency MAX SN74LVTH652 VCC = 2.7 V MIN MAX 150 Pulse duration, CLK high or low VCC = 3.3 V ± 0.3 V MIN 150 MAX VCC = 2.7 V MIN 150 3.3 3.3 3.3 Data high 1.3 1.6 1.2 1.5 Data low 1.9 2.
PAGE 8
SCBS706F − AUGUST 1997 − REVISED OCTOBER 2003 PARAMETER MEASUREMENT INFORMATION 6V S1 500 Ω From Output Under Test Open GND CL = 50 pF (see Note A) 500 Ω TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 6V GND 2.7 V LOAD CIRCUIT 1.5 V Timing Input 0V tw tsu 2.7 V Input 1.5 V 1.5 V th 2.7 V 1.5 V Data Input 1.5 V 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 2.7 V 1.
PAGE 9
PACKAGE OPTION ADDENDUM www.ti.
PAGE 10
PACKAGE OPTION ADDENDUM www.ti.com 31-Oct-2013 (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined.
PAGE 11
PACKAGE MATERIALS INFORMATION www.ti.com 12-Aug-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74LVTH652DBR SSOP DB 24 2000 330.0 16.4 8.2 8.8 2.5 12.0 16.0 Q1 SN74LVTH652PWR TSSOP PW 24 2000 330.0 16.4 6.95 8.3 1.6 8.0 16.
PAGE 12
PACKAGE MATERIALS INFORMATION www.ti.com 12-Aug-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LVTH652DBR SSOP DB 24 2000 367.0 367.0 38.0 SN74LVTH652PWR TSSOP PW 24 2000 367.0 367.0 38.
PAGE 13
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PAGE 17
MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
PAGE 18
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.