Datasheet

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SN75161B, SN75162B

OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS

SLLS005B – OCTOBER 1980 – REVISED MAY 1995

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Meets IEEE Standard 488-1978 (GPIB)

8-Channel Bidirectional Transceivers

Power-Up/Power-Down Protection

(Glitch Free)

Designed to Implement Control Bus

Interface

SN75161B Designed for Single Controller

SN75162B Designed for Multiple

Controllers

High-Speed, Low-Power Schottky Circuitry

Low Power Dissipation...72 mW Max Per

Channel

Fast Propagation Times . . . 22 ns Max

High-Impedance pnp Inputs

Receiver Hysteresis...650 mV Typ

Bus-Terminating Resistors Provided on

Driver Outputs

No Loading of Bus When Device Is

Powered Down (V

= 0)

description

The SN75161B and SN75162B eight-channel,

general-purpose interface bus transceivers are

monolithic, high-speed, low-power Schottky

devices designed to meet the requirements of

IEEE Standard 488-1978. Each transceiver is

designed to provide the bus-management and

data-transfer signals between operating units of

a single- or multiple-controller instrumentation

system. When combined with the SN75160B octal

bus transceiver, the SN75161B or SN75162B

provides the complete 16-wire interface for the

IEEE-488 bus.

The SN75161B and SN75162B feature eight

driver-receiver pairs connected in a front-to-back

configuration to form input/output (I/O) ports at

both the bus and terminal sides. A power-

up/-down disable circuit is included on all bus and

receiver outputs. This provides glitch-free opera-

tion during V

power up and power down.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

REN

IFC

NDAC

NRFD

DAV

EOI

ATN

SRQ

GND

REN

IFC

NDAC

NRFD

DAV

EOI

ATN

SRQ

(TOP VIEW)

REN

IFC

NDAC

NRFD

DAV

EOI

ATN

SRQ

GND

REN

IFC

NDAC

NRFD

DAV

EOI

ATN

SRQ

GPIB

I/O Ports

Terminal

I/O Ports

(TOP VIEW)

REN

IFC

NDAC

NRFD

DAV

EOI

ATN

SRQ

GND

REN

IFC

NDAC

NRFD

DAV

EOI

ATN

SRQ

(TOP VIEW)

NC–No internal connection

SN75161B . . . DW OR N PACKAGE

SN75162B . . . DW PACKAGE

SN75162B ...N PACKAGE

GPIB

I/O Ports

Terminal

I/O Ports

GPIB

I/O Ports

Terminal

I/O Ports

Summary of content (22 pages)

PAGE 1
SN75161B, SN75162B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS005B – OCTOBER 1980 – REVISED MAY 1995 D D D D D D D D D D D D D Meets IEEE Standard 488-1978 (GPIB) 8-Channel Bidirectional Transceivers Power-Up/Power-Down Protection (Glitch Free) Designed to Implement Control Bus Interface SN75161B Designed for Single Controller SN75162B Designed for Multiple Controllers High-Speed, Low-Power Schottky Circuitry Low Power Dissipation . . . 72 mW Max Per Channel Fast Propagation Times . . .
PAGE 2
SN75161B, SN75162B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS005B – OCTOBER 1980 – REVISED MAY 1995 description (continued) The direction of data through these driver-receiver pairs is determined by the DC, TE, and SC (on SN75162B) enable signals. The SC input on the SN75162B allows the REN and IFC transceivers to be controlled independently.
PAGE 3
SN75161B, SN75162B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS005B – OCTOBER 1980 – REVISED MAY 1995 CHANNEL-IDENTIFICATION TABLE NAME IDENTITY Direction Control TE Talk Enable SC System Control (SN75162B only) ATN Attention SRQ Service Request REN Remote Enable Bus IFC Interface Clear Management EOI End of Identity DAV Data Valid NDAC Not Data Accepted Data NRFD Not Ready for Data Transfer Control SN75161B logic symbol† DC TE 11 1 13 SN75161B logic diagram (positive
PAGE 4
SN75161B, SN75162B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS005B – OCTOBER 1980 – REVISED MAY 1995 SN75162B logic symbol† DC TE SC 12 2 1 EN1/G4 14 DC EN2/G5 EN3 TE ≥1 5 ATN SN75162B logic diagram (positive logic) EN3 SC 4 1 EOI SRQ REN IFC DAV NDAC NRFD 15 13 20 19 16 18 17 1 1 6 6 1 1 1 3 1 3 3 1 2 2 1 2 2 1 2 1 8 ATN ATN EOI EOI 1 3 9 2 10 3 4 7 5 6 12 2 1 14 9 15 8 13 10 20 3 19 4 16 7 18 5 17 6 EOI SRQ REN SRQ SRQ IFC REN REN DAV
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SN75161B, SN75162B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS005B – OCTOBER 1980 – REVISED MAY 1995 schematics of inputs and outputs EQUIVALENT OF ALL CONTROL INPUTS VCC TYPICAL OF SRQ, NDAC, AND NRFD GPIB I/O PORT VCC 10 kΩ NOM 1.7 kΩ NOM 9 kΩ NOM Input 4 kΩ NOM GND GND Input/Output Port Circuit inside dashed lines is on the driver outputs only. TYPICAL OF ALL I/O PORTS EXCEPT SRQ, NDAC, AND NRFD GPIB I/O PORTS VCC R(eq) 4 kΩ NOM 1.
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SN75161B, SN75162B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS005B – OCTOBER 1980 – REVISED MAY 1995 DISSIPATION RATING TABLE PACKAGE TA ≤ 25°C POWER RATING DERATING FACTOR ABOVE TA = 25°C TA = 70°C POWER RATING DW (20 pin) 1125 mW 9.0 mW/°C 720 mW DW (24 pin) 1350 mW 10.8 mW/°C 864 mW N (20 pin) 1150 mW 9.2 mW/°C 736 mW N (22 pin) 1700 mW 13.6 mW/°C 1088 mW recommended operating conditions Supply voltage, VCC High-level input voltage, VIH MIN NOM MAX UNIT 4.75 5 5.
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SN75161B, SN75162B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS005B – OCTOBER 1980 – REVISED MAY 1995 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER VIK Input clamp voltage Vhys Hysteresis voltage (VIT + – VIT –) VOH‡ High level output voltage High-level VOL Low level output voltage Low-level II Input current at maximum input voltage IIH IIL VI/O(b I/O(bus)) High-level input current Low-level inp
PAGE 8
SN75161B, SN75162B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS005B – OCTOBER 1980 – REVISED MAY 1995 switching characteristics, VCC = 5 V, CL = 15 pF, TA = 25°C (unless otherwise noted) PARAMETER tPLH Propagation delay time, low- to high-level output tPHL Propagation delay time, high- to low-level output tPLH Propagation delay time, low- to high-level output tPLH Propagation delay time, low- to high-level output tPHL TO (OUTPUT) TEST CONDITIONS Terminal Bus CL = 30 pF, See Figure 1
PAGE 9
SN75161B, SN75162B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS005B – OCTOBER 1980 – REVISED MAY 1995 PARAMETER MEASUREMENT INFORMATION 5V 200 Ω From (Bus) Output Under Test Test Point CL = 30 pF (see Note A) 480 Ω LOAD CIRCUIT 3V Terminal Input 1.5 V 1.5 V See Note B tPHL tPLH 0V VOH 2.2 V Bus Output 1.0 V VOH VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B.
PAGE 10
SN75161B, SN75162B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS005B – OCTOBER 1980 – REVISED MAY 1995 PARAMETER MEASUREMENT INFORMATION S1 5V 200 Ω From (Bus) Output Under Test Test Point CL = 15 pF (see Note A) 480 Ω LOAD CIRCUIT 3V Control Input 1.5 V 1.5 V See Note B 0V tPHZ tPZH Bus Output S1 Open 90% VOH 2V 0V tPZL tPLZ 3.5 V Bus Output S1 Closed 1V 0.5 V VOL VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B.
PAGE 11
SN75161B, SN75162B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS005B – OCTOBER 1980 – REVISED MAY 1995 PARAMETER MEASUREMENT INFORMATION S1 4.3 V 240 Ω From (Terminal) Output Under Test Test Point CL = 15 pF (see Note A) 3 kΩ LOAD CIRCUIT 3V Control Input 1.5 V 1.5 V See Note B tPZH Output Terminal S1 Open 0V tPHZ 90% VOH 1.5 V 0V tPLZ tPZL 4V Terminal Output S1 Closed 1V 0.7 V VOL VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B.
PAGE 12
SN75161B, SN75162B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS005B – OCTOBER 1980 – REVISED MAY 1995 TYPICAL CHARACTERISTICS TERMINAL I/O PORTS TERMINAL I/O PORTS LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT 0.6 VCC = 5 V TA = 25°C 3.5 VOL VOL – Low-Level Output Voltage – V VOH – High-Level Output Voltage – V VOH 4 3 2.5 2 1.5 1 VCC = 5 V TA = 25°C 0.5 0.4 0.3 0.2 0.1 0.
PAGE 13
SN75161B, SN75162B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS005B – OCTOBER 1980 – REVISED MAY 1995 TYPICAL CHARACTERISTICS GPIB I/O PORTS GPIB I/O PORTS HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 0 0.6 VOL – Low-Level Output Voltage – V VOH – High-Level Output Voltage – V VCC = 5 V TA = 25°C 3 2 1 VCC = 5 V TA = 25°C 0.5 0.4 0.3 0.2 0.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 18-Sep-2008 accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
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PACKAGE MATERIALS INFORMATION www.ti.com 3-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 10.8 13.3 2.7 12.0 24.0 Q1 SN75161BDWR SOIC DW 20 2000 330.0 24.4 SN75161BDWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 SN75162BDWR SOIC DW 24 2000 330.0 24.4 10.75 15.7 2.7 12.0 24.
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PACKAGE MATERIALS INFORMATION www.ti.com 3-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN75161BDWR SOIC DW 20 2000 367.0 367.0 45.0 SN75161BDWR SOIC DW 20 2000 367.0 367.0 45.0 SN75162BDWR SOIC DW 24 2000 367.0 367.0 45.
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