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SN75176A

DIFFERENTIAL BUS TRANSCEIVER

SLLS100A – JUNE 1984 – REVISED MAY 1995

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Bidirectional Transceiver

Meets or Exceeds the Requirements of

ANSI Standards EIA/TIA-422-B and ITU

Recommendation V.11

Designed for Multipoint Transmission on

Long Bus Lines in Noisy Environments

3-State Driver and Receiver Outputs

Individual Driver and Receiver Enables

Wide Positive and Negative Input/Output

Bus Voltage Ranges

Driver Output Capability...±60 mA Max

Thermal-Shutdown Protection

Driver Positive- and Negative-Current

Limiting

Receiver Input Impedance...12 kΩ Min

Receiver Input Sensitivity...±200 mV

Receiver Input Hysteresis...50 mV Typ

Operates From Single 5-V Supply

Low Power Requirements

description

The SN75176A differential bus transceiver is a monolithic integrated circuit designed for bidirectional data

communication on multipoint bus-transmission lines. It is designed for balanced transmission lines and meets

ANSI Standard EIA/TIA-422-B and ITU Recommendation V.11.

The SN75176A combines a 3-state differential line driver and a differential input line receiver, both of which

operate from a single 5-V power supply. The driver and receiver have active-high and active-low enables,

respectively, that can be externally connected together to function as a direction control. The driver differential

outputs and the receiver differential inputs are connected internally to form differential input/output (I/O) bus

ports that are designed to offer minimum loading to the bus whenever the driver is disabled or V

= 0. These

ports feature wide positive and negative common-mode voltage ranges making the device suitable for party-line

applications.

The driver is designed to handle loads up to 60 mA of sink or source current. The driver features positive- and

negative-current limiting and thermal shutdown for protection from line fault conditions. Thermal shutdown is

designed to occur at a junction temperature of approximately 150°C. The receiver features a minimum input

impedance of 12 kΩ, an input sensitivity of ±200 mV, and a typical input hysteresis of 50 mV.

The SN75176A can be used in transmission-line applications employing the SN75172 and SN75174 quadruple

differential line drivers and SN75173 and SN75175 quadruple differential line receivers.

The SN75176A is characterized for operation from 0°C to 70°C.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

GND

D OR P PACKAGE

(TOP VIEW)

Summary of content (19 pages)

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SN75176A DIFFERENTIAL BUS TRANSCEIVER SLLS100A – JUNE 1984 – REVISED MAY 1995 D D D D D D D D D D D D D D D OR P PACKAGE (TOP VIEW) Bidirectional Transceiver Meets or Exceeds the Requirements of ANSI Standards EIA/TIA-422-B and ITU Recommendation V.11 Designed for Multipoint Transmission on Long Bus Lines in Noisy Environments 3-State Driver and Receiver Outputs Individual Driver and Receiver Enables Wide Positive and Negative Input /Output Bus Voltage Ranges Driver Output Capability . . .
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SN75176A DIFFERENTIAL BUS TRANSCEIVER SLLS100A – JUNE 1984 – REVISED MAY 1995 Function Tables DRIVER OUTPUTS INPUT D ENABLE DE H H H L L H L H X L Z Z A B RECEIVER DIFFERENTIAL INPUTS A–B ENABLE RE OUTPUT R VID ≥ 0.2 V – 0.2 V < VID < 0.2 V L H L ? VID ≤ – 0.
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SN75176A DIFFERENTIAL BUS TRANSCEIVER SLLS100A – JUNE 1984 – REVISED MAY 1995 schematics of inputs and outputs EQUIVALENT OF EACH INPUT TYPICAL OF A AND B I/O PORTS TYPICAL OF RECEIVER OUTPUT VCC VCC VCC 85 Ω NOM R(eq) 16.
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SN75176A DIFFERENTIAL BUS TRANSCEIVER SLLS100A – JUNE 1984 – REVISED MAY 1995 recommended operating conditions Supply voltage, VCC Voltage at any bus terminal (separately or common mode), VI or VIC High-level input voltage, VIH D, DE, and RE Low-level input voltage, VIL D, DE, and RE Low level output current, current IOL Low-level TYP MAX UNIT 5 5.25 V 12 V –7 2 V 0.8 Differential input voltage, VID (see Note 2) High level output current, High-level current IOH MIN 4.
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SN75176A DIFFERENTIAL BUS TRANSCEIVER SLLS100A – JUNE 1984 – REVISED MAY 1995 DRIVER SECTION electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT – 1.5 V VIK Input clamp voltage II = – 18 mA VOH High level output voltage High-level VIH = 2 V,, IOH = – 33 mA VIL = 0.8 V,, 37 3.7 V VOL Low level output voltage Low-level VIH = 2 V,, IOH = 33 mA VIL = 0.8 V,, 11 1.
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SN75176A DIFFERENTIAL BUS TRANSCEIVER SLLS100A – JUNE 1984 – REVISED MAY 1995 RECEIVER SECTION electrical characteristics over recommended ranges of common-mode input voltage, supply voltage, and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS VIT + VIT– Positive-going input threshold voltage Vhys VIK Input hysteresis voltage (VIT + – VIT –) Enable clamp voltage II = – 18 mA VOH High level output voltage High-level VID = 200 mV,, See Figure 2 IOH = – 400 µ µA,,
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SN75176A DIFFERENTIAL BUS TRANSCEIVER SLLS100A – JUNE 1984 – REVISED MAY 1995 PARAMETER MEASUREMENT INFORMATION RL VID 2 VOD2 RL 2 VOH VOC +IOL VOL 0V – IOH Figure 2. Receiver VOH and VOL Figure 1. Driver VOD and VOC 3V Input Generator (see Note A) RL = 60 Ω CL = 50 pF (see Note B) 50 Ω 0V td(OD) td(OD) Output Output 3V 1.5 V 1.5 V CL 50% 10% 90% tt(OD) TEST CIRCUIT ≈ 2.5 V 50% 10% ≈ – 2.5 V tt(OD) VOLTAGE WAVEFORMS NOTES: A.
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SN75176A DIFFERENTIAL BUS TRANSCEIVER SLLS100A – JUNE 1984 – REVISED MAY 1995 5V 3V RL = 110 Ω S1 1.5 V 1.5 V 0V Output 3 V or 0 Generator (see Note A) Input tPZL tPLZ CL = 50 pF (see Note B) 50 Ω Output 5V 0.5 V 2.3 V VOL VOLTAGE WAVEFORMS TEST CIRCUIT NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω. B. CL includes probe and jig capacitance. Figure 5.
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SN75176A DIFFERENTIAL BUS TRANSCEIVER SLLS100A – JUNE 1984 – REVISED MAY 1995 S1 1.5 V 2 kΩ –1.5 V S2 5V CL = 15 pF (see Note B) Generator (see Note A) 5 kΩ 1N916 or Equivalent 50 Ω S3 TEST CIRCUIT 3V Input 3V 1.5 V S1 to 1.5 V 0 V S2 Open S3 Closed tPZH Input tPZL 1.5 V S1 to –1.5 V 0 V S2 Closed S3 Open VOH ≈ 4.5 V 1.5 V Output 0V Output 1.5 V VOL 3V Input 3V S1 to 1.5 V S2 Closed S3 Closed 1.5 V Input S1 to – 1.5 V S2 Closed S3 Closed 1.5 V 0V 0V tPHZ 0.5 V tPLZ ≈ 1.
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SN75176A DIFFERENTIAL BUS TRANSCEIVER SLLS100A – JUNE 1984 – REVISED MAY 1995 TYPICAL CHARACTERISTICS DRIVER DRIVER HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 5 VCC = 5 V TA = 25°C 4.5 4 3.5 3 2.5 2 1.5 1 4 3.5 3 2.5 2 1.5 1 0.5 0.5 0 VCC = 5 V TA = 25°C 4.
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SN75176A DIFFERENTIAL BUS TRANSCEIVER SLLS100A – JUNE 1984 – REVISED MAY 1995 TYPICAL CHARACTERISTICS RECEIVER OUTPUT VOLTAGE vs ENABLE VOLTAGE 5 VCC = 5 V VID = – 0.2 V IOL = 8 mA VO V O – Output Voltage – V 0.3 ÁÁ ÁÁ 0.2 ÁÁ ÁÁ ÁÁ VID = 0.2 V Load = 8 kΩ to GND TA = 25°C 4 0.4 0.1 VCC = 5 V 3 VCC = 5.25 V VCC = 4.75 V 2 1 0 0 0 10 70 20 30 50 40 60 TA – Free-Air Temperature – °C 0 80 0.5 2 1 1.5 VI – Enable Voltage – V Figure 12 2.
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SN75176A DIFFERENTIAL BUS TRANSCEIVER SLLS100A – JUNE 1984 – REVISED MAY 1995 APPLICATION INFORMATION SN65176A SN65176A RT RT Up to 32 Transceivers NOTE A: The line should be terminated at both ends in its characteristic impedance (RT = ZO). Stub lengths off the main line should be kept as short as possible. Figure 15.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 19-Mar-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN75176ADR Package Package Pins Type Drawing SOIC D 8 SPQ Reel Reel Diameter Width (mm) W1 (mm) 2500 330.0 12.4 Pack Materials-Page 1 A0 (mm) B0 (mm) K0 (mm) P1 (mm) 6.4 5.2 2.1 8.0 W Pin1 (mm) Quadrant 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 19-Mar-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN75176ADR SOIC D 8 2500 340.5 338.1 20.
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