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SLLS236G − OCTOBER 1996 − REVISED FEBRUARY 2009

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Integrated Transient Voltage Suppression

D ESD Protection for Bus Terminals Exceeds:

±30 kV IEC 61000-4-2, Contact Discharge

±15 kV IEC 61000-4-2, Air-Gap Discharge

±15 kV EIA/JEDEC Human Body Model

D Circuit Damage Protection of 400-W Peak

(Typical) Per IEC 61000-4-5

D Controlled Driver Output-Voltage Slew

Rates Allow Longer Cable Stub Lengths

D 250-kbps in Electrically Noisy

Environments

D Open-Circuit Fail-Safe Receiver Design

D 1/4 Unit Load Allows for 128 Devices

Connected on Bus

D Thermal Shutdown Protection

D Power-Up/-Down Glitch Protection

D Each Transceiver Meets or Exceeds the

Requirements of TIA/EIA-485 (RS-485) and

ISO/IEC 8482:1993(E) Standards

D Low Disabled Supply Current 300 µA Max

D Pin Compatible With SN75176

D Applications:

− Industrial Networks

− Utility Meters

− Motor Control

description

The SN75LBC184 and SN65LBC184 are differ-

ential data line transceivers in the trade-standard

footprint of the SN75176 with built-in protection

against high-energy noise transients. This feature

provides a substantial increase in reliability for

better immunity to noise transients coupled to the

data cable over most existing devices. Use of

these circuits provides a reliable low-cost

direct-coupled (with no isolation transformer) data

line interface without requiring any external

components.

The SN75LBC184 and SN65LBC184 can with-

stand overvoltage transients of 400-W peak

(typical). The conventional combination wave

called out in IEC 61000-4-5 simulates the

overvoltage transient and models a unidirectional

surge caused by overvoltages from switching and

secondary lightning transients.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications o

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

GND

functional logic diagram (positive logic)

Bus

Figure 1. Surge Waveform — Combination Wave

1.2 µs

50 µs

± V

± 1/2 V

SN65LBC184D (Marked as 6LB184)

SN75LBC184D (Marked as 7LB184)

SN65LBC184P (Marked as 65LBC184)

SN75LBC184P (Marked as 75LBC184)

(TOP VIEW)

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Summary of content (22 pages)

PAGE 1
SLLS236G − OCTOBER 1996 − REVISED FEBRUARY 2009 D Integrated Transient Voltage Suppression D ESD Protection for Bus Terminals Exceeds: D D D D D D D D D D D ± 30 kV IEC 61000-4-2, Contact Discharge ± 15 kV IEC 61000-4-2, Air-Gap Discharge ± 15 kV EIA/JEDEC Human Body Model Circuit Damage Protection of 400-W Peak (Typical) Per IEC 61000-4-5 Controlled Driver Output-Voltage Slew Rates Allow Longer Cable Stub Lengths 250-kbps
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SLLS236G − OCTOBER 1996 − REVISED FEBRUARY 2009 description (continued) A biexponential function defined by separate rise and fall times for voltage and current simulates the combination wave. The standard 1.2 µs/50 µs combination waveform is shown in Figure 1 and in the test description in Figure 15.
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SLLS236G − OCTOBER 1996 − REVISED FEBRUARY 2009 DRIVER FUNCTION TABLE INPUT ENABLE D DE A OUTPUTS H H H L L H L H X L Z Z B H = high level, L = low level, ? = indeterminate, X = irrelevant, Z = high impedance (off) RECEIVER FUNCTION TABLE DIFFERENTIAL INPUTS ENABLE OUTPUT A−B RE R VID ≥ 0.2 V −0.2 V < VID < 0.2 V L H L ? VID ≤ − 0.
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SLLS236G − OCTOBER 1996 − REVISED FEBRUARY 2009 absolute maximum ratings over operating free−air temperature range (unless otherwise noted)† Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Continuous voltage range at any bus terminal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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SLLS236G − OCTOBER 1996 − REVISED FEBRUARY 2009 DRIVER SECTION electrical characteristics over recommended operating conditions (unless otherwise noted) ALTERNATE SYMBOLS PARAMETER TEST CONDITIONS DE = RE = 5 V, No Load RE = 5 V, MIN ICC Supply current NA DE = 0 V, No Load IIH IIL High-level input current (D, DE, RE) NA Low-level input current (D, DE, RE) NA VI = 2.4 V VI = 0.
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SLLS236G − OCTOBER 1996 − REVISED FEBRUARY 2009 RECEIVER SECTION electrical characteristics over recommended operating conditions (unless otherwise noted) PARAMETER ICC TEST CONDITIONS Supply current (total package) DE = RE = 0 V, No Load RE = 5 V, No Load DE = 0 V, II Input current Other input = 0 V IOZ Vhys High-impedance-state output current VO = 0.4 V to 2.
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SLLS236G − OCTOBER 1996 − REVISED FEBRUARY 2009 PARAMETER MEASUREMENT INFORMATION Output 3V S1 Input 1.5 V 1.5 V 0 or 3 V Generator (see Note A) RL = 110 Ω CL = 50 pF (see Note B) 0V 0.5 V tPZH VOH 50 Ω Output 2.3 V tPHZ TEST CIRCUIT Voff ≈ 0 V VOLTAGE WAVEFORMS NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR = 1.
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SLLS236G − OCTOBER 1996 − REVISED FEBRUARY 2009 PARAMETER MEASUREMENT INFORMATION 3V Input 50% 50% 0V tPHL tPLH VO(A) 10% 90% 50% 90% 50% tr tf tPHL 90% VO(B) 50% 10% 10% ∼ 3.5 V ∼ 2.3 V ∼1V 50% 10% tr td(DH) tPLH 90% ∼ 3.5 V ∼ 2.3 V ∼1V tf td(DL) ∼ 2.5 V 0V ∼ −2.5 V VOD VOC VOC(PP) ∆VOC(SS) Figure 5.
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SLLS236G − OCTOBER 1996 − REVISED FEBRUARY 2009 PARAMETER MEASUREMENT INFORMATION A 27 Ω VOD D 27 Ω Output B Inputs VOC DE CL CL 3V DE 0V Inputs 3V D 0V Output VOC(PP) NOTES: A. Resistance values are in ohms and are 1% tolerance. B. CL includes probe and jig capacitance (± 10%). Figure 6. Driver VOC(PP) Test Circuit and Waveforms II A Input VI B 1.5 V Inputs RE 50% VO 50 pF (see Note A) Output 3V 1.
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SLLS236G − OCTOBER 1996 − REVISED FEBRUARY 2009 PARAMETER MEASUREMENT INFORMATION 5V A 620 Ω 0 V or 3 V R 1.5 V B RE 620 Ω 50 pF (see Note A) VO Input 3V A 0V 3V Inputs RE 3V 1.5 V 0V tPHZ Output VO tPZH 0.5 V 0V tPLZ 0.5 V tPZL ∼ 2.5 V VOH ∼ 2.5 V 0.5 V 0.5 V NOTE A: This value includes probe and jig capacitance (± 10%). Figure 8.
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SLLS236G − OCTOBER 1996 − REVISED FEBRUARY 2009 TYPICAL CHARACTERISTICS DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE DRIVER PROPAGATION DELAY TIME vs FREE-AIR TEMPERATURE 800 RL = 54 Ω 2.5 tpd − Driver Propagation Delay Time − ns VOD − Driver Differential Output Voltage − V 3.0 VCC = 5.25 V VCC = 5 V 2.0 VCC = 4.75 V 1.5 1.
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SLLS236G − OCTOBER 1996 − REVISED FEBRUARY 2009 TYPICAL CHARACTERISTICS RECEIVER INPUT CURRENT vs INPUT VOLTAGE 0.25 I(I) − Receiver Input Current − mA 0.20 0.15 0.10 0.05 −0.00 A, B (VCC = 0 V) −0.05 B (VCC = 5 V) −0.10 A (VCC = 5 V) −0.15 −0.
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SLLS236G − OCTOBER 1996 − REVISED FEBRUARY 2009 APPLICATION INFORMATION ’LBC184 test description The ’LBC184 is tested against the IEC 61000−4−5 recommended transient identified as the combination wave. The combination wave provides a 1.2-/50-µs open-circuit voltage waveform and a 8-/20-µs short-circuit current waveform shown in Figure 15.
PAGE 14
SLLS236G − OCTOBER 1996 − REVISED FEBRUARY 2009 APPLICATION INFORMATION Power 538 W Peak 0 33.6 V Peak, VI(peak) Clamping Voltage 0 16 A Peak, II(peak) Input Current 0 0 20 40 60 80 100 120 140 160 180 t − 20 µs/Div Figure 17.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 12-Feb-2009 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
PAGE 17
PACKAGE MATERIALS INFORMATION www.ti.com 12-Feb-2009 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN65LBC184DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 SN75LBC184DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 12-Feb-2009 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN65LBC184DR SOIC D 8 2500 340.5 338.1 20.6 SN75LBC184DR SOIC D 8 2500 340.5 338.1 20.
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