Datasheet

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FEATURES

APPLICATIONS

DESCRIPTION

SN75LVCP422

www.ti.com

................................................................................................................................................................................................... SLLS972 – MARCH 2009

Two Channel SATA 3-Gbps Redriver

• Excellent Jitter and Loss Compensation

Capability to Over 20 Inch FR4 Trace

• Data Rates up to 3 Gbps

• High Protection Against ESD Transient

• SATA Gen 2.6, eSATA Compliant

– HBM: 8000V

• SATA Hot-Plug Capable

– CDM: 1500V

• Supports Common-Mode Biasing for OOB

Signaling with Fast Turn-On – MM: 200V

• Channel Selectable Pre-Emphasis • 20-Pin SSOP Package

• Fixed Receiver Equalization • Pin Compatible with PI2EQX3211A and

PI2EQX3211B

• Integrated Termination

• Low Power

– < 200 mW Typ

• Notebooks, Desktops, Docking Stations,

– < 5 mW in Sleep Mode

Servers, and Workstations

– 15% Typ Lower Power in Auto Low Power

Mode

The SN75LVCP422 is a dual channel, single lane SATA redriver and signal conditioner supporting data rates up

to 3 Gbps. The device complies with SATA specification revision 2.6 and eSATA requirements.

The SN75LVCP422 operates from a single 3.3-V supply. Integrated 100- Ω line termination and self-biasing make

the device suitable for AC coupling. The inputs incorporate an OOB detector, which automatically turns the

differential outputs off while maintaining a stable output common-mode voltage compliant to SATA link. The

device is also designed to handle SSC transmission per SATA spec.

The SN75LVCP422 handles interconnect losses at both its input and output. The built-in transmitter

pre-emphasis feature is capable of applying 0 dB or 2.5 dB of relative amplification at higher frequencies to

counter the expected interconnect loss. On the receive side the device applies a fixed equalization of 7 dB to

boost input frequencies near 1.5 GHz. Collectively, the input equalization and output pre-emphasis features of

the device work to fully restore SATA signal integrity over extended cable and backplane pathways.

The device is hot-plug capable

(1)

preventing device damage under device hot-insertion such as async signal

plug/removal, unpowered plug/removal, powered plug/removal, or surprise plug/removal.

(1) Requires use of AC coupling capacitors at differential inputs and outputs.

ORDERING INFORMATION

(1)

PART NUMBER PART MARKING PACKAGE

SN75LVCP422DB LVCP422 20-Pin SSOP Tube

SN75LVCP422DBR LVCP422 20-Pin SSOP Reel (large)

(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

web site at www.ti.com .

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (17 pages)

PAGE 1
SN75LVCP422 www.ti.com ................................................................................................................................................................................................... SLLS972 – MARCH 2009 Two Channel SATA 3-Gbps Redriver • FEATURES 1 • • • • • • • • Data Rates up to 3 Gbps SATA Gen 2.
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SN75LVCP422 SLLS972 – MARCH 2009 ................................................................................................................................................................................................... www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
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SN75LVCP422 www.ti.com ................................................................................................................................................................................................... SLLS972 – MARCH 2009 GND [5, 9, 12, 16] VBB = 1.
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SN75LVCP422 SLLS972 – MARCH 2009 ................................................................................................................................................................................................... www.ti.
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SN75LVCP422 www.ti.com ................................................................................................................................................................................................... SLLS972 – MARCH 2009 TYPICAL DEVICE IMPLEMENTATION 3.3V VCC 10nF 10nF 10nF TX_0P RX_0N GND TX_0N GND VCC VCC TX_1P RX_1P TX_1N RX_1N D1 10 GPIO 10nF VCC RX_0P GND 20 10nF 10nF GND eSATA Connector SATA Host 10nF EN 0.01uF D0 0.1uF 1.
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SN75LVCP422 SLLS972 – MARCH 2009 ................................................................................................................................................................................................... www.ti.com – The device enters and exits low power mode by actively monitoring the input signal (VIDp-p) level on each of its channels independently. When the input signal on either or both channels is in the electrical idle state, i.e.
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SN75LVCP422 www.ti.com ...................................................................................................................................................................................................
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SN75LVCP422 SLLS972 – MARCH 2009 ................................................................................................................................................................................................... www.ti.
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SN75LVCP422 www.ti.com ...................................................................................................................................................................................................
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SN75LVCP422 SLLS972 – MARCH 2009 ................................................................................................................................................................................................... www.ti.
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SN75LVCP422 www.ti.com ................................................................................................................................................................................................... SLLS972 – MARCH 2009 IN tPDelay tPDelay OUT Figure 4. Propagation Delay Timing Diagram IN+ Vcm 50 mV INtOOB2 tOOB1 OUT+ Vcm OUT- Figure 5. OOB Enter and Exit Timing 1-bit tDE 2.5 dB 1 to N bits 1-bit 1 to N bits 0dB Vcm DiffVPPTX DiffVPPTX_PE 0dB tDE 2.5 dB Figure 6.
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SN75LVCP422 SLLS972 – MARCH 2009 ................................................................................................................................................................................................... www.ti.com RX_0,1P VCMRX RX_0,1N tOOB1 AutoLPEXIT TX_0,1P VCMT X TX_0,1N AutoLPENT RY Power Saving Mode Figure 7.
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PACKAGE OPTION ADDENDUM www.ti.com 16-Mar-2009 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN75LVCP422DB ACTIVE SSOP DB 20 SN75LVCP422DBR ACTIVE SSOP DB 20 70 Lead/Ball Finish MSL Peak Temp (3) Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN75LVCP422DBR Package Package Pins Type Drawing SSOP DB 20 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2000 330.0 16.4 Pack Materials-Page 1 8.2 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 7.5 2.5 12.0 16.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN75LVCP422DBR SSOP DB 20 2000 367.0 367.0 38.
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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.