Datasheet

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FEATURES

GND

VCC

RO2

RO1

DI1

DI2

RI1

RI2

DO1

DO2

DW AND D PACKAGE

(TOP VIEW)

DESCRIPTION

DI1

DI2

RO2

RO1

RI1

RI2

DO1

DO2

Enable Truth Table

TB5T1

SLLS589C – NOVEMBER 2003 – REVISED OCTOBER 2007

www.ti.com

DUAL DIFFERENTIAL PECL DRIVER/RECEIVER

In circuits with termination resistors, the line remains

impedance- matched when the circuit is powered

• Functional Replacement for the Agere BTF1A

down. The driver does not load the line when it is

• Driver Features

powered down.

– Third-State Logic Low Output

All devices are characterized for operation from -40 ° C

– ESD Protection HBM > 3 kV, CDM > 2 kV

to 85 ° C.

– No Line Loading when V

= 0

The logic inputs of this device include internal pull-up

– Capable of Driving 50- Ω loads

resistors of approximately 40 k Ω that are connected

to V

to ensure a logical high level input if the inputs

– 2.0-ns Maximum Propagation Delay

are open circuited.

– 0.2-ns Output Skew (typical)

PIN ASSIGNMENTS

• Receiver Features

– High-Input Impedance Approximately 8 k Ω

– 4.0-ns Maximum Propagation Delay

– 50-mV Hysteresis

– Slew Rate Limited (1 ns min 80% to 20%)

– ESD Protection HBM > 3 kV, CDM > 2 kV

– -1.1-V to 7.1-V Input Voltage Range

• Common Device Features

– Common Enable for Each Driver/Receiver

Pair

FUNCTIONAL BLOCK DIAGRAM

– Operating Temperature Range: -40 ° C to

85 ° C

– Single 5.0 V ± 10% Supply

– Available in Gull-Wing SOIC (JEDEC

MS-013, DW) and SOIC (D) Package

The TB5T1 device is a dual differential driver/receiver

circuit that transmits and receives digital data over

balanced transmission lines. The dual drivers

translate input TTL logic levels to differential

pseudo-ECL output levels. The dual receivers convert

differential-input logic levels to TTL output levels.

Each driver or receiver pair has its own common

enable control allowing serial data and a control clock

to be transmitted and received on a single integrated

circuit. The TB5T1 requires the customer to supply

ED ER D1 D2 R1 R2

termination resistors on the circuit board.

0 0 Active Active Active Active

The power-down loading characteristics of the

1 0 Disabled Disabled Active Active

receiver input circuit are approximately 8 k Ω relative

0 1 Active Active Disabled Disabled

to the power supplies; hence, it does not load the

1 1 Disabled Disabled Disabled Disabled

transmission line when the circuit is powered down.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (22 pages)

PAGE 1
TB5T1 www.ti.com SLLS589C – NOVEMBER 2003 – REVISED OCTOBER 2007 DUAL DIFFERENTIAL PECL DRIVER/RECEIVER FEATURES 1 • • • • Functional Replacement for the Agere BTF1A Driver Features – Third-State Logic Low Output – ESD Protection HBM > 3 kV, CDM > 2 kV – No Line Loading when VCC = 0 – Capable of Driving 50-Ω loads – 2.0-ns Maximum Propagation Delay – 0.2-ns Output Skew (typical) Receiver Features – High-Input Impedance Approximately 8 kΩ – 4.
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TB5T1 www.ti.com SLLS589C – NOVEMBER 2003 – REVISED OCTOBER 2007 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
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TB5T1 www.ti.com SLLS589C – NOVEMBER 2003 – REVISED OCTOBER 2007 ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range unless otherwise noted (1) UNIT Supply voltage, VCC 0 V to 6 V Magnitude of differential bus (input) voltage, |VRI1 - VRI1|, |VRI2 - VRI2| ESD Human Body Model (2) Charged-Device Model 8.
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TB5T1 www.ti.com SLLS589C – NOVEMBER 2003 – REVISED OCTOBER 2007 THIRD STATE A TB5T1 driver produces pseudo-ECL levels and has a third state mode, which is different from a conventional TTL device. When a TB5T1 driver is placed in the third state, the base of the output transistors are pulled low, bringing the outputs below the active-low level of standard PECL devices. (For example: The TB5T1 low output level is typically 2.7 V, while the third state noninverting output level is typically 1.2 V.
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TB5T1 www.ti.com SLLS589C – NOVEMBER 2003 – REVISED OCTOBER 2007 RECEIVER ELECTRICAL CHARACTERISTICS over operating free-air temperature range unless otherwise noted PARAMETER TEST CONDITIONS VOL Output low voltage VCC = 4.5 V, IOL = 8.0 mA VOH Output high voltage VCC = 4.5 V, IOH = -400 µA (1) VIL Enable input low voltage VIH Enable input high voltage (1) VCC = 4.5 V VIK Enable input clamp voltage VCC = 4.5 V, II = -5 mA MIN TYP MAX 2.4 V V VCC= 5.5 V (1) UNIT 0.4 0.
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TB5T1 www.ti.
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TB5T1 www.ti.com SLLS589C – NOVEMBER 2003 – REVISED OCTOBER 2007 PARAMETER MEASUREMENT INFORMATION 2.4 V 1.5 V INPUT 0.4 V t t P2 P1 VOH OUTPUTS VOL tPHH t PLL VOH (V OH+ VOL)/2 OUTPUT VOL t PLH t PHL VOH (V OH+ VOL)/2 OUTPUT VOL 80% VOH 80% OUTPUT 20% 20% tTLH VOL tTHL Figure 2. Driver Propagation Delay Times 2.4 V ED 1.5 V 0.4 V tPHZ tPZH VOH VOL +0.2 V VOL OUTPUT VOL −0.1 V OUTPUT −0.47 V tPLZ tPZL VOL VOL −0.1 V OUTPUT A. NOTE: In the third state, OUTPUT is 0.
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TB5T1 www.ti.com SLLS589C – NOVEMBER 2003 – REVISED OCTOBER 2007 PARAMETER MEASUREMENT INFORMATION (continued) 3.7 V INPUT 3.2 V 2.7 V INPUT t PLH t PHL OUTPUT 80% V OH 80% 1.5 V 20% 20% t THL VOL t TLH Figure 4. Receiver Propagation Delay Times 2.4 V ER 1.5 V 0.4 V t PZH t PHZ t PLZ t PZL V OH OUTPUT V OL 0.2 V 0.2 V 0.2 V 0.2 V Figure 5.
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TB5T1 www.ti.com SLLS589C – NOVEMBER 2003 – REVISED OCTOBER 2007 PARAMETER MEASUREMENT INFORMATION (continued) VOC 50 W CL 200 W VOH 50 W CP = OUTPUTS VOL CL 200 W 2 pF VOC CL includes test−fixture and probe capacitance. A. VOC(PP) NOTE: All input pulses are supplied by a generator having the following characteristics: tr or tf = 1 ns, pulse repetition rate (PRR) = 0.25 Mbps, pulse width = 500 ± 10 ns. CP includes the instrumentation and fixture capacitance within 0,06 m of the D.U.T.
PAGE 10
TB5T1 www.ti.com SLLS589C – NOVEMBER 2003 – REVISED OCTOBER 2007 TYPICAL CHARACTERISTICS OUTPUT-VOLTAGE vs OUTPUT CURRENT, DRIVER VOL AND VOH EXTREMES vs FREE-AIR TEMPERATURE, DRIVER 0 0 VOH AND VOL EXTREMES FOR DRIVERS TA = 255C Voltage Characteristics − V −0.5 VOH −1 −1.5 −2 −2.5 VOL −3 −3.5 −50 −40 −30 −20 −10 VCC = 4.5 V to 5.5 V, Load = 100 W −0.5 −2 0 50 100 Figure 10. Figure 11.
PAGE 11
TB5T1 www.ti.com SLLS589C – NOVEMBER 2003 – REVISED OCTOBER 2007 TYPICAL CHARACTERISTICS (continued) PROPAGATION DELAY TIME tP1 or tP2 vs FREE-AIR TEMPERATURE, DRIVER LOW-TO-HIGH PROPAGATION DELAY vs FREE-AIR TEMPERATURE, RECEIVER 6 VCC = 4.5 V to 5.5 V Load = 100 W tPLH − Low-to-High Propagation Delay − ns t pd − Propagation Delay Time − ns 1.6 1.4 1.2 Max Delay 1 Min Delay 0.
PAGE 12
TB5T1 www.ti.com SLLS589C – NOVEMBER 2003 – REVISED OCTOBER 2007 APPLICATION INFORMATION 140 Power Dissipation There are two common approaches to estimating the internal die junction temperature, TJ.
PAGE 13
TB5T1 www.ti.com SLLS589C – NOVEMBER 2003 – REVISED OCTOBER 2007 Load Circuits The test load circuits shown in Figure 6 and Figure 7 are based on a recommended pi type of load circuit shown in Figure 18. The 100-Ω differential load resistor RT at the receiver provide proper termination for the interconnecting transmission line, assuming it has a 100-Ω characteristic impedance.
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PACKAGE OPTION ADDENDUM www.ti.
PAGE 15
PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties.
PAGE 16
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device TB5T1DWR Package Package Pins Type Drawing SOIC DW 16 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2000 330.0 16.4 Pack Materials-Page 1 10.75 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 10.7 2.7 12.0 16.
PAGE 17
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TB5T1DWR SOIC DW 16 2000 367.0 367.0 38.
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