Datasheet
A0
P17
P16
P15
P14
P13
24 22 21
20 19
SDA
RESET
A1
SCL
23
7 9 10 11 128
P00
P01
P02
P03
P04
P05
1
2
3
4
5
6
18
17
16
15
14
13
P10
P11
P06
P07
P12
GND
V
CC
INT
Exposed
Center
Pad
INT
A1
RESET
P00
P01
P02
P03
P04
P05
P06
P07
GND
V
CC
SDA
SCL
A0
P17
P16
P15
P14
P13
P12
P11
P10
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
TCA1116
www.ti.com
SCPS229 –SEPTEMBER 2011
LOW VOLTAGE 16-BIT I
2
C I/O EXPANDER
WITH INTERRUPT AND RESET
Check for Samples: TCA1116
1
FEATURES
• I
2
C to Parallel Port Expander • Polarity Inversion Register
• Supports partial power down i.e. SDA and SCL • Configurable with up to four different I2C
are 5V tolerant (<1uA leakage) even when addresses using hardware pins
Vcc=0
• Directly drive LEDs using high current push
• Supports 1.8V I
2
C operation pull outputs
• Open-Drain Active-Low Interrupt Output • Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• Active-Low Reset Input
• ESD Protection Exceeds JESD 22
• I/O Ports are 5V tolerant
– 2000-V Human-Body Model (A114-A)
• Low Standby-Current Consumption of
3 μA Max – 1000-V Charged-Device Model (C101)
• 400-kHz Fast I
2
C Bus support
PW PACKAGE RTW PACKAGE
(TOP VIEW) (TOP VIEW)
The exposed center pad, if used, must be
connected as a secondary ground or left
electrically open.
DESCRIPTION
This 16-bit I/O expander for the two-line bidirectional bus (I
2
C) is designed for 1.65-V to 5.5-V V
CC
operation. It
provides general-purpose remote I/O expansion for most microcontroller families via the I
2
C interface [serial clock
(SCL), serial data (SDA)]. Two hardware pins (A0 and A1) are used to program and vary the fixed I
2
C address
and allow up to four devices to share the same I
2
C bus. The TCA1116 consists of two 8-bit Configuration (input
or output selection), Input Port, Output Port, and Polarity Inversion (active-high or active-low operation) registers.
At power-on, the I/Os are configured as inputs. The system master can enable the I/Os as either inputs or
outputs by writing to the I/O configuration bits. The data for each input or output is kept in the corresponding
Input or output register. The polarity of the Input Port register can be inverted with the Polarity Inversion register.
All registers can be read by the system master.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2011, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.