Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLinear ICsLinear IC - Op-amp Voltage feedback MSOP 8 PowerPad

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   

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SLOS274D − DECEMBER 1999 − REVISED JUNE 2001

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Ultralow 3.4 mA Per Channel Quiescent

Current

D High Speed

− 175 MHz Bandwidth (−3 dB, G = 1)

− 230 V/µs Slew Rate

− 43 ns Settling Time (0.1%)

D High Output Drive, I

= 85 mA (typ)

D Excellent Video Performance

− 35 MHz Bandwidth (0.1 dB, G = 1)

− 0.01% Differential Gain

− 0.05° Differential Phase

D Very Low Distortion

− THD = −64 dBc (f = 1 MHz, R

= 150 Ω)

− THD = −79 dBc (f = 1 MHz, R

= 1 kΩ)

D Wide Range of Power Supplies

− V

= ±5 V to ±15 V

D Available in Standard SOIC or MSOP

PowerPAD Package

D Evaluation Module Available

description

The THS4081 and THS4082 are ultralow-power,

high-speed voltage feedback amplifiers that are

ideal for communication and video applications.

These amplifiers operate off of a very low 3.4-mA

quiescent current per channel and have a high

output drive capability of 85ĂmA. The signal-

amplifier THS4081 and the dual-amplifier

THS4082 offer very good ac performance with

175-MHz bandwidth, 230-V/µs slew rate, and

43-ns settling time (0.1%). With total harmonic

distortion (THD) of −64 dBc at f = 1 MHz, the

THS4081 and THS4082 are ideally suited for

applications requiring low distortion.

RELATED DEVICES

DEVICE DESCRIPTION

THS4011/2

THS4031/2

THS4051/2

290-MHz Low Distortion High-Speed Amplifiers

100-MHz Low Noise High Speed-Amplifiers

70-MHz High-Speed Amplifiers

PowerPAD is a trademark of Texas Instruments.

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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NC − No internal connection

Cross Section View Showing

PowerPAD Option (DGN)

2.2

2.4

2.6

2.8

3.0

3.2

3.4

3.6

3.8

5 7 9 11 13 15

=85°C

SUPPLY CURRENT

SUPPLY VOLTAGE

± V

- Supply Voltage - V

− Supply Current − mA

=−40°C

=25°C

IN−

IN+

CC−

OUT

THS4081

D OR DGN PACKAGE

(TOP VIEW)

1OUT

1IN−

1IN+

CC−

2OUT

2IN−

2IN+

THS4082

D OR DGN PACKAGE

(TOP VIEW)

CAUTION: The THS4081 and THS4082 provide ESD protection circuitry. However, permanent damage can still occur if this device

is subjected to high-energy electrostatic discharges. Proper ESD precautions are recommended to avoid any performance

degradation or loss of functionality.

Summary of content (32 pages)

PAGE 1
SLOS274D − DECEMBER 1999 − REVISED JUNE 2001 D Ultralow 3.4 mA Per Channel Quiescent D D D D D D D THS4081 D OR DGN PACKAGE (TOP VIEW) Current High Speed − 175 MHz Bandwidth (−3 dB, G = 1) − 230 V/µs Slew Rate − 43 ns Settling Time (0.1%) High Output Drive, IO = 85 mA (typ) Excellent Video Performance − 35 MHz Bandwidth (0.1 dB, G = 1) − 0.01% Differential Gain − 0.
PAGE 2
SLOS274D − DECEMBER 1999 − REVISED JUNE 2001 AVAILABLE OPTIONS PACKAGED DEVICES TA 0°C to 70°C NUMBER OF CHANNELS PLASTIC SMALL OUTLINE† (D) PLASTIC MSOP† (DGN) MSOP SYMBOL EVALUATION MODULE 1 THS4081CD THS4081CDGN AEO THS4081EVM 2 THS4082CD THS4082CDGN AER THS4082EVM 1 THS4081ID THS4081IDGN AEQ — −40°C to 85°C 2 THS4082ID THS4082IDGN AEP † The D and DGN packages are available taped and reeled.
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SLOS274D − DECEMBER 1999 − REVISED JUNE 2001 absolute maximum ratings over operating free-air temperature (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±16.5 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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SLOS274D − DECEMBER 1999 − REVISED JUNE 2001 electrical characteristics at TA = 25°C, VCC = ±15 V, RL = 150 Ω (unless otherwise noted) dynamic performance PARAMETER MIN TYP Gain = 1 VCC = ± 15 V VCC = ± 5 V Gain = −1 Bandwidth for 0.
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SLOS274D − DECEMBER 1999 − REVISED JUNE 2001 electrical characteristics at TA = 25°C, VCC = ±15 V, RL = 150 Ω (unless otherwise noted) (continued) dc performance PARAMETER TEST CONDITIONS VCC = ± 15 V, VO = ± 10 V, RL = 1 kΩ TA = 25°C TA = full range† VCC = ± 5 V, VO = ± 2.
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SLOS274D − DECEMBER 1999 − REVISED JUNE 2001 electrical characteristics at TA = 25°C, VCC = ±15 V, RL = 150 Ω (unless otherwise noted) (continued) power supply PARAMETER TEST CONDITIONS Dual supply VCC Supply voltage operating range Single supply VCC = ± 15 V ICC Supply current (per amplifier) VCC = ± 5 V PSRR Power supply rejection ratio VCC = ± 5 V or ± 15 V † Full range = 0°C to 70°C for C suffix and − 40°C to 85°C for I suffix 6 POST OFF
PAGE 7
SLOS274D − DECEMBER 1999 − REVISED JUNE 2001 TYPICAL CHARACTERISTICS 45° 80 0° 60 Gain 40 −45° 90° Phase 20 135° VCC = ±15 V Gain = 1 RF = 0 Ω RL = 150 Ω 0 −20 −40 −60 180° 0 CROSSTALK vs FREQUENCY 20 Crosstalk − dB 100 Phase Responce Open Loop Gain − dB OPEN LOOP GAIN & PHASE RESPONSE vs FREQUENCY VCC = ±5 V and ±15 V −20 100 1k 10k 100k 1M 10M 100M −225° 1G −80 100k 1M f − Frequency − Hz TOTAL HARMONIC DISTORTION
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SLOS274D − DECEMBER 1999 − REVISED JUNE 2001 TYPICAL CHARACTERISTICS DISTORTION vs FREQUENCY −60 −70 2nd Harmonic −80 DISTORTION vs FREQUENCY −50 VCC = ± 5 V RL = 1 kΩ Gain = 2 VO(PP) = 2 V −70 VCC = ± 15 V RL = 150 Ω Gain = 2 VO(PP) = 2 V −60 Distortion − dBc Distortion − dBc −60 −50 VCC = ± 15 V RL = 1 kΩ Gain = 2 VO(PP) = 2 V Distortion − dBc −50 DISTORTION vs FREQUENCY 2nd Harmonic −80 3rd Harmonic −70 2nd Harmonic −80 3rd Harmo
PAGE 9
SLOS274D − DECEMBER 1999 − REVISED JUNE 2001 TYPICAL CHARACTERISTICS OUTPUT AMPLITUDE vs FREQUENCY OUTPUT AMPLITUDE vs FREQUENCY 2 2 2 RF = 1 kΩ −2 −4 VCC = ± 5 V Gain = −1 RL = 150 Ω VO(PP) = 63 mV RF = 1.3 kΩ −2 −4 −6 −8 10.00 100k 100.00 1000.00 10000.00 1M 10M 100M 100000.
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SLOS274D − DECEMBER 1999 − REVISED JUNE 2001 TYPICAL CHARACTERISTICS 2-V STEP RESPONSE 20-V STEP RESPONSE 12 VCC = ± 15 V Gain = 2 RF = 1.2 kΩ RL = 150 Ω 0.8 0.6 1.5 VCC = ± 15 V Gain = 5 RF = 1.2 kΩ RL = 150 Ω 10 8 V O − Output Voltage − V 1.0 0.4 0.2 −0.0 −0.2 −0.4 −0.6 6 4 2 0 −2 −4 −6 −0.8 −8 −1.0 −10 −1.2 V IO − Input Offset Voltage − mV 1.
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SLOS274D − DECEMBER 1999 − REVISED JUNE 2001 APPLICATION INFORMATION theory of operation The THS408x is a high-speed, operational amplifier configured in a voltage feedback architecture. It is built using a 30-V, dielectrically isolated, complementary bipolar process with NPN and PNP transistors possessing fTs of several GHz.
PAGE 12
SLOS274D − DECEMBER 1999 − REVISED JUNE 2001 APPLICATION INFORMATION noise calculations and noise figure (continued) eRs RS en Noiseless + _ eni IN+ eno eRf RF eRg IN− RG Figure 39. Noise Model The total equivalent input noise density (eni) is calculated by using the following equation: e ni + Ǹǒ ǒ 2 e nǓ ) IN ) R Ǔ S 2 ǒ ) IN– ǒRF ø RGǓǓ 2 ǒ Ǔ ) 4 kTR s ) 4 kT R ø R F G Where: k = Boltzmann’s constant = 1.
PAGE 13
SLOS274D − DECEMBER 1999 − REVISED JUNE 2001 APPLICATION INFORMATION noise calculations and noise figure (continued) This brings up another noise measurement usually preferred in RF applications, the noise figure (NF). Noise figure is a measure of noise degradation caused by the amplifier. The value of the source resistance must be defined and is typically 50 Ω in RF applications.
PAGE 14
SLOS274D − DECEMBER 1999 − REVISED JUNE 2001 APPLICATION INFORMATION driving a capacitive load Driving capacitive loads with high performance amplifiers is not a problem as long as certain precautions are taken. The first is to realize that the THS408x has been internally compensated to maximize its bandwidth and slew rate performance.
PAGE 15
SLOS274D − DECEMBER 1999 − REVISED JUNE 2001 APPLICATION INFORMATION general configurations When receiving low-level signals, limiting the bandwidth of the incoming signals is often required. The simplest way to accomplish this is to place an RC filter at the noninverting terminal of the amplifier (see Figure 43). RG RF − VI VO + R1 C1 f V O + V I ǒ 1) R R F G Ǔǒ –3dB + 1 2pR1C1 Ǔ 1 1 ) sR1C1 Figure 43.
PAGE 16
SLOS274D − DECEMBER 1999 − REVISED JUNE 2001 APPLICATION INFORMATION general PowerPAD design considerations The THS408x is available packaged in a thermally-enhanced DGN package, which is a member of the PowerPAD family of packages. This package is constructed using a downset leadframe upon which the die is mounted [see Figure 44(a) and Figure 44(b)].
PAGE 17
SLOS274D − DECEMBER 1999 − REVISED JUNE 2001 APPLICATION INFORMATION general PowerPAD design considerations (continued) Although there are many ways to properly heatsink this device, the following steps illustrate the recommended approach. Thermal pad area (68 mils x 70 mils) with 5 vias (Via diameter = 13 mils) Figure 45. PowerPAD PCB Etch and Via Pattern 1. Prepare the PCB with a top side etch pattern as shown in Figure 45.
PAGE 18
SLOS274D − DECEMBER 1999 − REVISED JUNE 2001 APPLICATION INFORMATION general PowerPAD design considerations (continued) The actual thermal performance achieved with the THS408xDGN in its PowerPAD package depends on the application. In the example above, if the size of the internal ground plane is approximately 3 inches × 3 inches, then the expected thermal coefficient, θJA, is about 58.4_C/W.
PAGE 19
SLOS274D − DECEMBER 1999 − REVISED JUNE 2001 APPLICATION INFORMATION general PowerPAD design considerations (continued) The next consideration is the package constraints. The two sources of heat within an amplifier are quiescent power and output power. The designer should never forget about the quiescent heat generated within the device, especially multiamplifier devices.
PAGE 20
SLOS274D − DECEMBER 1999 − REVISED JUNE 2001 APPLICATION INFORMATION general PowerPAD design considerations (continued) THS4082 MAXIMUM RMS OUTPUT CURRENT vs RMS OUTPUT VOLTAGE DUE TO THERMAL LIMITS 180 1000 Maximum Output Current Limit Line Package With θJA ≤ 64°C/W | IO | − Maximum RMS Output Current − mA | IO | − Maximum RMS Output Current − mA 200 160 140 120 100 SO-8 Package θJA = 167°C/W Low-K Test PCB 80 60 Safe Operating Area 40
PAGE 21
SLOS274D − DECEMBER 1999 − REVISED JUNE 2001 APPLICATION INFORMATION evaluation board An evaluation board is available for the THS4081 (literature number SLOP242) and THS4082 (literature number SLOP239). This board has been configured for very low parasitic capacitance in order to realize the full performance of the amplifier. A schematic of the evaluation board is shown in Figure 51.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device THS4081CDGNR Package Package Pins Type Drawing MSOPPower PAD SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant DGN 8 2500 330.0 12.4 5.3 3.3 1.3 8.0 12.0 Q1 THS4081CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 THS4081IDGNR MSOPPower PAD DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.
PAGE 26
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) THS4081CDGNR MSOP-PowerPAD DGN 8 2500 346.0 346.0 35.0 THS4081CDR SOIC D 8 2500 367.0 367.0 35.0 THS4081IDGNR MSOP-PowerPAD DGN 8 2500 364.0 364.0 27.0 THS4082CDGNR MSOP-PowerPAD DGN 8 2500 358.0 335.0 35.0 THS4082CDR SOIC D 8 2500 367.0 367.0 35.0 THS4082IDGNR MSOP-PowerPAD DGN 8 2500 358.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.