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ManualsBrandsTEXAS INSTRUMENTS ManualsLinear ICsLinear IC - Op-amp, differential amplifier Differential QFN 16 (3x3)

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APPLICATIONS

Summary of content (37 pages)

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THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 WIDEBAND, LOW NOISE, LOW DISTORTION FULLY DIFFERENTIAL AMPLIFIER WITH RAIL-TO-RAIL OUTPUTS FEATURES • • • • • • • • • • • • DESCRIPTION Fully Differential Architecture With Rail-to-Rail Outputs Centered Input Common-mode Range Minimum Gain of 1 V/V (0 dB) Bandwidth: 620 MHz Slew Rate: 570 V/μs 0.
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THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
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THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 DEVICE INFORMATION RGT Package (TOP VIEW) VS− 16 15 14 13 NC 1 12 PD VIN− 2 11 VIN+ VOUT+ 3 10 VOUT− CM 4 9 5 7 6 CM 8 VS+ TERMINAL FUNCTIONS TERMINAL (RGT PACKAGE) NO.
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THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 SPECIFICATIONS; VS+ – VS– = 5 V: Test conditions unless otherwise noted: VS+ = +2.5 V, VS– = –2.
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THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 SPECIFICATIONS; VS+ – VS– = 5 V: (continued) Test conditions unless otherwise noted: VS+ = +2.5 V, VS– = –2.
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THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 SPECIFICATIONS; VS+ – VS– = 3.3 V: Test conditions unless otherwise noted: VS+ = +1.65 V, VS– = –1.
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THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 SPECIFICATIONS; VS+ – VS– = 3.3 V: (continued) Test conditions unless otherwise noted: VS+ = +1.65 V, VS– = –1.
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THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 TYPICAL CHARACTERISTICS TYPICAL AC PERFORMANCE: VS+ – VS– = 5 V Test conditions unless otherwise noted: VS+ = +2.5 V, VS– = –2.
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THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 SMALL-SIGNAL FREQUENCY RESPONSE 22 RF = 499 W 20 G = 20 dB 18 Signal Gain - dB 10 G = 10 dB 6 G = 6 dB 4 2 -2 G = 14 dB 12 10 G = 10 dB 8 6 G = 6 dB 2 G = 0 dB G = 0 dB 0 0.1 1 10 f - Frequency - MHz 100 -2 1000 0.1 1 10 f - Frequency - MHz Figure 2. HD2 vs FREQUENCY VO = 2VPP HD3 vs FREQUENCY VO = 2VPP 1000 -50 -60 3rd Order Harmonic Distortion - dBc RF = 499 W, VO = 2 VPP, VS = ±2.
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THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 HD2 vs OUTPUT VOLTAGE SWING FREQUENCY = 1MHz HD3 vs OUTPUT VOLTAGE SWING FREQUENCY = 1MHz -50 RF = 499 W, VS = ±2.
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THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 HD2 vs LOAD RESISTANCE FREQUENCY = 8MHz HD3 vs LOAD RESISTANCE FREQUENCY = 8MHz -80 VO = 6 VPP RF = 499 W, VS = ±2.5 V, f = 8 MHz -85 VO = 4 VPP VO = 6 VPP 3rd Order Harmonic Distortion - dBc 2nd Order Harmonic Distortion - dBc -80 -90 -95 -100 VO = 2 VPP -105 -110 VO = 4 VPP -90 VO = 2 VPP -95 RF = 499 W, VS = ±2.
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THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 SLEW RATE vs OUTPUT VOLTAGE TRANSIENT RESPONSE 2.5 V OD − Differential Output V oltage − V 600 550 Slew Rate - V/ms 500 450 400 350 Gain = 6 dB RF = 499 W 300 RL = 200 W VS = ±2.5 V 250 200 2 1.5 1 VOD = 4 VPP VS = ±2.5 V Gain = 6 dB RL = 200 W -0.5 0 -0.5 -1 -1.5 -2 -2.5 0 1 3 5 6 7 2 4 VOD - Differential Output Voltage - VPP 8 t − Time − 5 ns/div Figure 19. Figure 20.
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THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 OPEN LOOP GAIN AND PHASE vs FREQUENCY 120 40 -80 60 40 -120 20 -160 100 1 10 k 10 In Vn -200 10 G 100 M 1M Vn − Voltage Noise − nV/ Hz -40 I n − Current Noise − pA/ Hz Phase Open Loop Phase − degrees 0 Gain 80 1 10 1k 100 100 k 1M Figure 25. Figure 26. QUIESCENT CURRENT vs SUPPLY VOLTAGE POWER SUPPLY CURRENT vs SUPPLY VOLTAGE IN POWER-DOWN MODE 15 10 14.
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THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 DIFFERENTIAL OUTPUT OFFSET VOLTAGE vs CM INPUT VOLTAGE CM INPUT BIAS CURRENT vs CM INPUT VOLTAGE 4 Differential Output Offset Voltage - mV Common-Mode Input Bias Current - mA 200 150 100 50 0 -50 -100 -150 -2.5 -2 -1.5 -1 -0.5 0 0.5 1 1.5 VICR - Common-Mode Input Voltage - V 2 3 2 1 0 -1 -2 -3 -4 -5 -6 -7 -2.5 2.5 -2 -1.5 -1 -0.5 0 0.5 1 1.5 VICR - Common-Mode Input Voltage - V Figure 31. Figure 32.
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THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 TYPICAL AC PERFORMANCE: VS+ – VS– = 3.3 V Test conditions unless otherwise noted: VS+ = 1.65 V, VS– = –1.
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THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 HD2 vs FREQUENCY VO = 2VPP HD3 vs FREQUENCY VO = 2VPP -50 RF = 499 W, VO = 2 VPP, VS = ±1.65 V -60 3rd Order Harmonic Distortion - dBc 2nd Order Harmonic Distortion - dBc -50 -70 -80 RL = 1 kW RL = 2 kW -90 RL = 500 W -100 RF = 499 W, VO = 2 VPP, VS = ±1.65 V -60 -70 RL = 200 W -80 RL = 2 kW -90 RL = 500 W -100 RL = 1 kW RL = 200 W -110 -110 10 f - Frequency - MHz 1 1 100 Figure 37.
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THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 HD2 vs LOAD RESISTANCE FREQUENCY = 1MHZ HD3 vs LOAD RESISTANCE FREQUENCY = 1MHZ -40 RF = 499 W, VS = ±1.65 V, f = 1 MHz -50 -60 -70 -80 VO = 4 VPP VO = 1 VPP -90 -100 -110 VO = 2 VPP -60 -70 VO = 4 VPP -80 VO = 1 VPP -90 -100 VO = 2 VPP -110 -120 -120 0 500 1000 1500 RL - Load Resistance - W 0 2000 500 1000 1500 RL - Load Resistance - W Figure 42. Figure 43.
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THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 0.1 dB FLATNESS S-PARAMETERS vs FREQUENCY 10 Gain = 6 dB, RF = 499 W, RL = 200 W, VO = 1 VPP, VS = ±1.65 V 6.7 6.6 6.5 6.4 6.3 6.2 6.1 6 5.9 5.8 5.7 5.6 5.5 0.1 0 S21 -10 S-Parameters - dB Signal Gain - dB 7 6.9 6.8 -20 -30 -40 S11 -50 -60 S22 Gain = 0 dB RF = 499 W S12 RL = 200 W VO = 100 mVPP VS = ±1.65 V -70 1 10 f - Frequency - MHz 100 -80 1000 -90 10 1 100 1000 f - Frequency - MHz Figure 48. Figure 49.
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THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 VOCM - Signal Gain - dB CM SMALL SIGNAL FREQUENCY RESPONSE 3 2 1 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 -16 -17 -18 -19 -20 RF = 499 W RL = 200 W Gain = 0 dB VO = 100 mVPP VS = ±1.65 V 0.1 1 10 100 1000 f - Frequency - MHz Figure 54. TEST CIRCUITS The THS4520 is tested with the following test circuits built on the EVM.
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THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 of the network analyzer is 50 Ω. RIT and RG are chosen to impedance match to 50 Ω, and to maintain the proper gain. To balance the amplifier, a 0.22-μF capacitor and 49.9-Ω resistor to ground are inserted across RIT on the alternate input. The output is probed using a high-impedance differential probe across the 100-Ω resistor. The gain is referred to the amplifier output by adding back the 6-dB loss due to the voltage divider on the output.
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THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 APPLICATION INFORMATION APPLICATIONS The following circuits show application information for the THS4520. For simplicity, power supply decoupling capacitors are not shown in these diagrams. For more detail on the use and operation of fully differential op amps see application report Fully-Differential Amplifiers (SLOA054) .
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THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 required for best performance, but it is intended to be a DC bias input pin. Bypass capacitors are recommended on this pin to reduce noise at the output. The external current required to overdrive the internal resistor divider is given by Equation 2: IEXT = 2VCM - (VS + - VS - ) 50 kW (2) where VCM is the voltage applied to the CM pin.
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THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 Table 4 is a modification of Table 1 to add the proper values with RPU assuming a 50-Ω source impedance and setting the input and output common-mode voltage to mid-supply. There are two drawbacks to this configuration. One is it requires additional current from the power supply. Using the values shown for a gain of 0 dB requires 10 mA more current with 5-V supply, and 6.5 mA more current with 3.3-V supply.
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THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 and the reduced bandwidth due to increased noise gain when the circuit is configured for low forward gain. Note that using noise gain compensation increases the circuit output noise and decreases the circuit bandwidth. Compared to the default configuration (no RC) using RC = 200 Ω and RC = 487 Ω increases the circuit output noise by approximately 10.9dB and 6dB respectively.
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THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 particular interest because their joint interaction reflects the usable slewing and bandwidth limits of a device. Output swing and frequency limits are often prime consideration when picking a device and quantifying their joint impact on HD allows a more precise judgment on the ability of a device to meet the need for speed. The curves that separate each colored region represent the value of HD2,3 indicated on the plot.
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THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 Figure 68. Constant HD3 Contours vs Output Swing and log10 (Frequency - MHz) Vs = 2.5 V, Gain = 1, RL = 200 Ω Figure 69. Constant HD2 Contours vs Output Swing and log10 (Frequency - MHz) Vs = 1.
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THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 6 RL=200ohms Vs = 3.3V 5.5 -80dBc -70dBc 5 -60dBc 4.5 -50dBc Vout (Vpp) 4 -40dBc -90dBc 3.5 3 -100dBc 2.5 2 1.5 1 -110dBc 0 0.2 0.4 0.6 0.8 1 1.2 log [Frequency(MHz)] 1.4 1.6 1.8 2 10 Figure 70. Constant HD2 Contours vs Output Swing and log10 (Frequency - MHz) Vs = 1.
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THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 THS4520 EVM Figure 72 is the THS4520 EVAL1 EVM schematic, layers 1 through 4 of the PCB are shown Figure 73, and Table 5 is the bill of material for the EVM as supplied from TI. GND VS− J4 VS+ J5 J6 VEE 0.1 mF TP1 C9 C10 0.1 mF VCC 10 mF C4 10 mF R3 C15 R12 49.9 W 12 2 3 VO+ − U1 11 0.22 mF + J2 R4 4 487 W R2 53.6 W R9 open 7 PD 487 W VO− PwrPad 10 R7 86.6 W R8 86.6 W 15 13 14 16 VEE R6 J3 T1 R11 69.
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THS4520 www.ti.com SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007 Table 5. THS4520 EVAL1 EVM Bill of Materials ITEM DESCRIPTION SMD SIZE REFERENCE DESIGNATOR PCB QTY MANUFACTURER'S PART NUMBER 1 CAP, 10.0 μF, Ceramic, X5R, 6.3V 0805 C3, C4, C5, C6 4 (AVX) 08056D106KAT2A 2 CAP, 0.1 μF, Ceramic, X5R, 10V 0402 C9, C10, C11, C12, C13, C14 6 (AVX) 0402ZD104KAT2A 3 CAP, 0.22 ΩF, Ceramic, X5R, 6.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant THS4520RGTR QFN RGT 16 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 THS4520RGTT QFN RGT 16 250 180.0 12.4 3.3 3.3 1.1 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) THS4520RGTR QFN RGT 16 3000 367.0 367.0 35.0 THS4520RGTT QFN RGT 16 250 210.0 185.0 35.
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