Datasheet

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 
SLAS277A −MARCH 2000 − REVISED SEPTEMBER 2002
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range, AV
DD
= 5 V,
DV
DD
= 5 V, IOUT
FS
= 20 mA, single-ended output IOUT1, 50 Ω doubly terminated load (unless
otherwise noted) (continued)
ac specifications
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
AC linearity (to Nyquist)
f
CLK
= 5 MSPS, f
OUT
= 1 MHz, T
A
= 25°C 68
f
CLK
= 25 MSPS, f
OUT
= 1 MHz, T
A
= 25°C 69
f
CLK
= 25 MSPS, f
OUT
= 5 MHz, T
A
= 25°C 68
f
CLK
= 25 MSPS, f
OUT
= 10 MHz, T
A
= 25°C 56
f
CLK
= 50 MSPS, f
OUT
= 1 MHz, T
A
= 25°C 67
f
CLK
= 50 MSPS, f
OUT
= 5 MHz, T
A
= 25°C 67
SFDR Spurious free dynamic range
f
CLK
= 50 MSPS, f
OUT
= 20 MHz, T
A
= 25°C
53
dBc
SFDR
Spurious free dynamic range
f
CLK
= 70 MSPS, f
OUT
= 5 MHz, T
A
= 25°C 65
dBc
f
CLK
= 70 MSPS, f
OUT
= 10 MHz, T
A
= 25°C 63
f
CLK
= 70 MSPS, f
OUT
= 20 MHz, T
A
= 25°C 48
f
CLK
= 100 MSPS, f
OUT
= 10 MHz, T
A
= 25°C 55
f
CLK
= 100 MSPS, f
OUT
= 22 MHz, T
A
= 25°C 55
f
CLK
= 100 MSPS, f
OUT
= 40 MHz, T
A
= 25°C 48
digital specifications
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Interface
V
IH
High-level input voltage
DV
DD
= 5 V 3.5 5
V
V
IH
High-level input voltage
DV
DD
= 3.3 V
2.1 3.3
V
V
IL
Low-level input voltage
DV
DD
= 5 V 0 1.3
V
V
IL
Low-level input voltage
DV
DD
= 3.3 V
0 0.9
V
I
IH
High-level input current
MODE and SLEEP DV
DD
= 3 V to 5.5 V −15 15
A
I
IH
High-level input current
All other digital pins
DV
DD
= 3 V to 5.5 V −10 10
µA
I
IL
Low-level input current
MODE and SLEEP DV
DD
= 3 V to 5.5 V −15 15
A
I
IL
Low-level input current
All other digital pins
DV
DD
= 3 V to 5.5 V −10 10
µA
C
I
Input capacitance 1 5 pF
Timing
t
su(D)
Input setup time 1 ns
t
h(D)
Input hold time 1 ns
t
w(LPH)
Input latch pulse high time 4 ns
t
d(D)
Digital delay time
1 clk
Specifications subject to change