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

   

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SLVS024E – FEBRUARY 1983 – REVISED NOVEMBER 1999

www.ti.com

D Complete PWM Power Control Circuitry

D Completely Synchronized Operation

D Internal Undervoltage Lockout Protection

D Wide Supply Voltage Range

D Internal Short-Circuit Protection

D Oscillator Frequency ...500 kHz Max

D Variable Dead Time Provides Control Over

Total Range

D Internal Regulator Provides a Stable 2.5-V

Reference Supply

D Available in Q-Temp Automotive

HighRel Automotive Applications

Configuration Control / Print Support

Qualification to Automotive Standards

description

The TL1451A incorporates on a single monolithic

chip all the functions required in the construction

of two pulse-width-modulation (PWM) control

circuits. Designed primarily for power-supply

control, the TL1451A contains an on-chip 2.5-V

regulator, two error amplifiers, an adjustable

oscillator, two dead-time comparators, undervol-

tage lockout circuitry, and dual common-emitter

output transistor circuits.

The uncommitted output transistors provide

common-emitter output capability for each

controller. The internal amplifiers exhibit a common-mode voltage range from 1.04 V to 1.45 V. The dead-time

control (DTC) comparator has no offset unless externally altered and can provide 0% to 100% dead time. The

on-chip oscillator can be operated by terminating RT and CT. During low V

conditions, the undervoltage

lockout control circuit feature locks the outputs off until the internal circuitry is operational.

The TL1451AC is characterized for operation from –20°C to 85°C. The TL1451AQ is characterized for operation

from –40°C to 125°C. The TL1451AM is characterized for operation from –55°C to 125°C.

AVAILABLE OPTIONS

PACKAGED DEVICES

SMALL

OUTLINE

(D)

SMALL

OUTLINE

(DB)

†

PLASTIC DIP

(N)

SMALL

OUTLINE

(NS)

TSSOP

(PW)

†

CHIP

CARRIER

(FK)

CERAMIC

DIP

(J)

–20°C to 85°C TL1451ACD TL1451ACDB TL1451ACN TL1451ACNS TL1451ACPW — —

–40°C to 125°C TL1451AQD — — — — — —

–55°C to 125°C — — — — — TL1451AMFK TL1451AMJ

†

The DB and PW packages are only available left-end taped and reeled (add LE suffix, i.e., TL1451ACPWLE).

         

       

   



Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

ERROR 1IN+

AMPLIFIER 1 1IN–

1FEEDBACK

1DTC

1OUT

GND

REF

SCP

2IN+ ERROR

2IN– AMPLIFIER 2

2FEEDBACK

2DTC

2OUT

D, DB, N, NS, PW, OR J PACKAGE

(TOP VIEW)

1920132

1312119 10

2IN+

2IN–

2FEEDBACK

2DTC

1IN+

1IN–

1FEEDBACK

IDTC

REF

SCP

GND

OUT

1OUT

FK PACKAGE

(TOP VIEW)

        

       

        

Summary of content (37 pages)

PAGE 1
SLVS024E – FEBRUARY 1983 – REVISED NOVEMBER 1999 CT RT ERROR 1IN+ AMPLIFIER 1 1IN– 1FEEDBACK 1DTC 1OUT GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 REF SCP 2IN+ ERROR 2IN– AMPLIFIER 2 2FEEDBACK 2DTC 2OUT VCC NC REF 3 2 1 20 19 description 1IN+ 4 18 2IN+ 1IN– 5 17 2IN– NC 6 16 NC 1FEEDBACK 7 15 2FEEDBACK IDTC 8 2OUT V CC 10 11 12 13 GND 14 2DTC 9 1OUT The TL1451A incorporates on a single monolithic chip all th
PAGE 2
SLVS024E – FEBRUARY 1983 – REVISED NOVEMBER 1999 functional block diagram 2 DTC ERROR AMPLIFIER 2 IN+ IN– 2 FEEDBACK 1 FEEDBACK SCP VCC RT 9 2 11 14 13 10 + 12 Oscillator 1/2 Vref 5 15 IN– 4 16 REF UVLO S 3 PWM COMP Reference Voltage 12 kΩ R IN+ 2 OUTPUT – 170 kΩ ERROR AMPLIFIER 1 CT 1 R + 7 – 1 OUTPUT PWM COMP 1 DTC 6 8 COMPONENT COUNT 65 Resistors Capacitors 8 Transistors 105 JFETs 2 18 www.ti.
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SLVS024E – FEBRUARY 1983 – REVISED NOVEMBER 1999 absolute maximum ratings over operating free-air temperature range† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 V Amplifier input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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SLVS024E – FEBRUARY 1983 – REVISED NOVEMBER 1999 electrical characteristics over recommended operating free-air temperature range, VCC = 6 V, f = 200 kHz (unless otherwise noted) reference section TL1451AC PARAMETER TEST CONDITIONS Output voltage (pin 16) IO = 1 mA TA = –20°C to 25°C O tp t voltage Output oltage change with ith temperat temperature re Input voltage regulation Output voltage regulation Short-circuit output current † All typical val
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SLVS024E – FEBRUARY 1983 – REVISED NOVEMBER 1999 dead-time control section PARAMETER TEST CONDITIONS TL1451AC MIN TYP† MAX Input bias current (DTC) 1 Latch mode (source) current (DTC) TA = 25°C IO = 40 µA Latched input voltage (DTC) –80 Input threshold voltage at f = 10 kHz (DTC) Maximum duty cycle V 2.05 1.2 µA µA –145 2.3 Zero duty cycle UNIT 2.25 1.45 V † All typical values are at TA = 25°C.
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SLVS024E – FEBRUARY 1983 – REVISED NOVEMBER 1999 electrical characteristics over recommended operating free-air temperature range, VCC = 6 V, f = 200 kHz (unless otherwise noted) reference section TL1451AQ, TL1451AM PARAMETER O tp t voltage Output oltage (pin 16) TEST CONDITIONS MIN TYP† MAX 2.40 2.50 2.60 2.35 2.46 2.65 –0.63% *±4% TA = 25°C TA = 125°C 2.0 12.5 0.7 15 TA = MIN TA = 25°C 0.3 30 1.0 7.5 TA = 125°C TA = MIN 0.
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SLVS024E – FEBRUARY 1983 – REVISED NOVEMBER 1999 short-circuit protection control section PARAMETER Input In ut threshold voltage (SCP) TEST CONDITIONS TA = 25°C TA = 125°C 650 700 750 400 478 550 TA = MIN 800 880 950 140 185 230 TA = 25°C TA = 125°C 60 120 70 120 TA = MIN 60 120 Standby voltage (SCP) Latched input in ut voltage (SCP) TL1451AQ, TL1451AM MIN TYP† MAX Equivalent timing resistance Comparator threshold voltage (F
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SLVS024E – FEBRUARY 1983 – REVISED NOVEMBER 1999 error-amplifier section PARAMETER Input In ut offset voltage TEST CONDITIONS VO (FEEDBACK) = 1.25 V TL1451AQ, TL1451AM MIN TYP† MAX ±6 TA = 25°C TA = 125°C ±10 VO (FEEDBACK) = 1.25 V Input In ut bias current VO (FEEDBACK) = 1.
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SLVS024E – FEBRUARY 1983 – REVISED NOVEMBER 1999 total device PARAMETER TEST CONDITIONS Standby supply current Average supply current † All typical values are at TA = 25°C unless otherwise indicated. TL1451AQ, TL1451AM MIN TYP† MAX UNIT Off-state 1.3 1.8 mA RT = 10 kΩ 1.7 2.4 mA PARAMETER MEASUREMENT INFORMATION Test Input S1 VCC = 5 V RL CPE 0.47 µF 4.7 kΩ OUT1 RL 4.
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SLVS024E – FEBRUARY 1983 – REVISED NOVEMBER 1999 TYPICAL CHARACTERISTICS TRIANGLE OSCILLATOR FREQUENCY vs TIMING RESISTANCE OSCILLATOR FREQUENCY VARIATION vs FREE-AIR TEMPERATURE 3 VCC = 5 V TA = 25°C f osc – Oscillator Frequency Variation – % ∆afosc ffosc osc – Triangle Oscillator Frequency – Hz 1M CT = 150 pF 100 k CT = 1500 pF 10 k CT = 15000 pF 1k 1k 4k 10 k 40 k 100 k 400 k VCC = 3.
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SLVS024E – FEBRUARY 1983 – REVISED NOVEMBER 1999 TYPICAL CHARACTERISTICS REFERENCE OUTPUT VOLTAGE VARIATION vs FREE-AIR TEMPERATURE 30 avref – Reference Output Voltage Variation – mV ∆VO(ref) avref – Reference Output Voltage Variation – mV ∆VO(ref) REFERENCE OUTPUT VOLTAGE VARIATION vs FREE-AIR TEMPERATURE VCC = 3.
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SLVS024E – FEBRUARY 1983 – REVISED NOVEMBER 1999 TYPICAL CHARACTERISTICS UNDERVOLTAGE LOCKOUT HYSTERESIS CHARACTERISTICS – Output Collector Voltage – V VVCE CE Undervoltage Lockout Threshold Voltage – V TA = 25°C TA = –20°C TA = 85°C ÁÁ ÁÁ ÁÁ UNDERVOLTAGE LOCKOUT CHARACTERISTIC 5 4 3 5V RL 2 7,10 I = IO 8 VDE 1 300 3.5 IO = 10 mA 3.25 Threshold Voltage –VTH (Left Scale) 3 200 Threshold Voltage –VTL (Left Scale) 2.75 150 2.
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SLVS024E – FEBRUARY 1983 – REVISED NOVEMBER 1999 TYPICAL CHARACTERISTICS PROTECTION ENABLE TIME vs PROTECTION ENABLE CAPACITANCE 18 tpe t pe – Protection Enable Time – s 15 12 9 6 3 0 0 200 50 100 150 CPE – Protection Enable Capacitance – µF SCP 15 Vref 16 170 kΩ Short-circuit Protection Comparator 12 kΩ CPE ERROR AMP 1 ERROR AMP 2 250 Vref S R Protection Latch Vref U.V.L.O. + 1.25 V – Figure 14 www.ti.
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SLVS024E – FEBRUARY 1983 – REVISED NOVEMBER 1999 TYPICAL CHARACTERISTICS OPEN-LOOP VOLTAGE AMPLIFICATION vs FREQUENCY ERROR AMP MAXIMUM OUTPUT VOLTAGE SWING vs FREQUENCY 2 90 VCC = 5 V TA = 25°C Open-Loop Voltage Amplification – dB Error Amp Maximum Output Voltage Swing – V 2.25 1.75 1.5 1.25 1 0.75 0.5 0.
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SLVS024E – FEBRUARY 1983 – REVISED NOVEMBER 1999 TYPICAL CHARACTERISTICS CLOSED-LOOP GAIN AND PHASE SHIFT vs FREQUENCY 70 Phase Shift (Right Scale) 50 40 47 pF 470 pF 4700 pF 0° Closed-Loop Gain (Left Scale) –10° –20° 30 –30° Phase Shift Closed-Loop Gain – dB 60 CX: VCC = 5 V Rref = 150 Ω Cref = 470 pF TA = 25°C –40° 20 –50° –60° –70° 10 –80° 0 100 1k 10 k 100 k –90° 1M f – Frequency – Hz Vref + – 39 kΩ Cx Rref Cref 39 kΩ T
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SLVS024E – FEBRUARY 1983 – REVISED NOVEMBER 1999 TYPICAL CHARACTERISTICS CLOSED-LOOP GAIN AND PHASE SHIFT vs FREQUENCY 70 CX: Phase Shift (Right Scale) 50 Closed-Loop Gain (Left Scale) 40 47 pF 470 pF 4700 pF 0° –10° –20° 30 –30° –40° 20 –50° –60° –70° 10 –80° 0 100 1k 10 k 100 k f – Frequency – Hz Vref + – 39 kΩ Cx Rref Cref 39 kΩ Test Circuit Figure 19 16 www.ti.
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SLVS024E – FEBRUARY 1983 – REVISED NOVEMBER 1999 TYPICAL CHARACTERISTICS CLOSED-LOOP GAIN AND PHASE SHIFT vs FREQUENCY 70 CX: 50 40 Phase Shift (Right Scale) Closed-Loop Gain (Left Scale) 47 pF 470 pF 4700 pF 0° –10° –20° 30 –30° Phase Shift Closed-Loop Gain – dB 60 VCC = 5 V Rref = 15 Ω Cref = 470 pF TA = 25°C –40° 20 –50° –60° –70° 10 –80° 0 100 1k 10 k 100 k –90° 1M f – Frequency – Hz Vref + – 39 kΩ Cx Rref Cref 39 kΩ Test
PAGE 18
SLVS024E – FEBRUARY 1983 – REVISED NOVEMBER 1999 TYPICAL CHARACTERISTICS CLOSED-LOOP GAIN AND PHASE SHIFT vs FREQUENCY 70 50 0° 40 Closed-Loop Gain (Left Scale) Phase Shift (Right Scale) 30 –10° –20° –30° –40° 20 –50° –60° –70° 10 –80° 0 100 1k 10 k 100 k f – Frequency – Hz Vref + – 39 kΩ Cref 39 kΩ Test Circuit Figure 21 18 www.ti.
PAGE 19
SLVS024E – FEBRUARY 1983 – REVISED NOVEMBER 1999 TYPICAL CHARACTERISTICS OUTPUT SINK CURRENT vs COLLECTOR OUTPUT SATURATION VOLTAGE 120 TA = –20°C 110 TA = 25°C Output Sink Current – mA 100 90 TA = 85°C 80 70 60 50 40 30 20 VCC = 3.6 V 10 0 0 15 5 10 Collector Output Saturation Voltage – V 20 Figure 22 VO(ref) –0.01 1 VO(ref) –0.02 0.9 Maximum Output Voltage Swing (Right Scale) VO(ref) –0.03 0.8 VO(ref) –0.04 0.
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SLVS024E – FEBRUARY 1983 – REVISED NOVEMBER 1999 TYPICAL CHARACTERISTICS OUTPUT TRANSISTOR ON DUTY CYCLE vs DEAD-TIME INPUT VOLTAGE STANDBY CURRENT vs SUPPLY VOLTAGE VCC = 3.6 V RT = 10kΩ CT = 330 pF 10 20 IICC CC (Standby) – Standby Current – mA Output Transistor “On” Duty Cycle – % 0 30 40 50 60 70 ÁÁ ÁÁ 80 90 100 0 0.5 1 1.5 2 2.5 3 3.5 TA = 25°C 2 1.75 1.5 1.25 1 0.75 0.5 0.
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SLVS024E – FEBRUARY 1983 – REVISED NOVEMBER 1999 APPLICATION INFORMATION VCC 220 kΩ 0.47 µF 150 Ω 470 Ω 50 kΩ 33 kΩ L1 330 pF R1 R2 33 kΩ R3 33 kΩ 33 kΩ Step-Up C2 Output R4 C1 500 pF Vref 16 15 14 13 12 11 10 9 TL1451A 1 2 3 4 5 6 7 8 470 Ω 470 Ω R5 C5 220 Ω 500 pF 1 µF L2 R6 470 Ω 33 kΩ Step-Down C4 Output R7 33 kΩ NOTE A: Values for R1 through R7, C1 through C4, and L1 and L2 depend upon individual application.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 24-Jan-2013 (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Mar-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TL1451ACDBR SSOP DB 16 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1 TL1451ACDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 TL1451ACDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Mar-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TL1451ACDBR SSOP DB 16 2000 367.0 367.0 38.0 TL1451ACDR SOIC D 16 2500 333.2 345.9 28.6 TL1451ACDR SOIC D 16 2500 367.0 367.0 38.0 TL1451ACNSR SO NS 16 2000 367.0 367.0 38.0 TL1451ACPWR TSSOP PW 16 2000 367.0 367.0 35.0 TL1451AQDR SOIC D 16 2500 367.0 367.0 38.
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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.