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 

  

 

SLVS423 A− MAY 2002 − REVISED SEPTEMBER 2002

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Two Complete PWM Control Circuits

D Outputs Drive MOSFETs Directly

D Oscillator Frequency...50 kHz to 2 MHz

D 3.6-V to 20-V Supply-Voltage Range

D Low Supply Current . . . 3.5 mA Typ

D Adjustable Dead-Time Control, 0% to 100%

D 1.26-V Reference

description

The TL1454A is a dual-channel pulse-width-mod-

ulation (PWM) control circuit, primarily intended

for low-power, dc/dc converters. Applications

include LCD displays, backlight inverters, note-

book computers, and other products requiring

small, high-frequency, dc/dc converters.

Each PWM channel has its own error amplifier, PWM comparator, dead-time control comparator, and MOSFET

driver. The voltage reference, oscillator, undervoltage lockout, and short-circuit protection are common to both

channels.

Channel 1 is configured to drive n-channel MOSFETs in step-up or flyback converters, and channel 2 is

configured to drive p-channel MOSFETs in step-down or inverting converters. The operating frequency is set

with an external resistor and an external capacitor, and dead time is continuously adjustable from 0 to 100%

duty cycle with a resistive divider network. Soft start can be implemented by adding a capacitor to the dead-time

control (DTC) network. The error-amplifier common-mode input range includes ground, which allows the

TL1454A to be used in ground-sensing battery chargers as well as voltage converters.

AVAILABLE OPTIONS

PACKAGED DEVICES

†

CHIP FORM

SMALL OUTLINE

(D)

PLASTIC DIP

(N)

TSSOP

(PW)

SSOP

(DB)

SOP-EIAJ

(NS)

CHIP FORM

(Y)

−20°C to 85°C TL1454ACD TL1454ACN TL1454ACPWR TL1454ACDB TL1454ACNS TL1454AY

†

The D, DB and NS packages are available taped and reeled. Add the suffix R to the device name (e.g., TL1454ACDR). The PW package is

available only left-end taped and reeled (indicated by the R suffix on the device type; e.g., TL1454ACPWR).

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!%"!/  (( &%!%"*

DTC1

IN1+

IN1−

COMP1

GND

OUT1

D, N OR PW PACKAGE

(TOP VIEW)

REF

SCP

DTC2

IN2+

IN2−

COMP2

OUT2

Summary of content (25 pages)

PAGE 1
SLVS423 A− MAY 2002 − REVISED SEPTEMBER 2002 D D D D D D D D, N OR PW PACKAGE (TOP VIEW) Two Complete PWM Control Circuits Outputs Drive MOSFETs Directly Oscillator Frequency . . . 50 kHz to 2 MHz 3.6-V to 20-V Supply-Voltage Range Low Supply Current . . . 3.5 mA Typ Adjustable Dead-Time Control, 0% to 100% 1.
PAGE 2
SLVS423 A− MAY 2002 − REVISED SEPTEMBER 2002 functional block diagram VCC 10 Voltage REF GND COMP1 IN1 + IN1 − RT CT 2 1 1.26 V 2.5 V 7 16 To Internal Circuitry 1.2 V OSC 5 VCC PWM Comparator 1 6 4 REF 1.8 V + _ 8 OUT1 Error Amplifier 1 PWM Comparator 2 COMP2 11 13 + IN2 + 12 _ IN2 − Error Amplifier 2 VCC UVLO and SCP Latch 9 SCP Comparator 2 1V 1V SCP Comparator 1 0.65 V 0.65 V 1.
PAGE 3
SLVS423 A− MAY 2002 − REVISED SEPTEMBER 2002 TL1454AY chip information This device, when properly assembled, displays characteristics similar to the TL1454AC. Thermal compression or ultrasonic bonding may be used on the doped aluminum bonding pads. The chips may be mounted with conductive epoxy or a gold-silicon preform.
PAGE 4
SLVS423 A− MAY 2002 − REVISED SEPTEMBER 2002 theory of operation reference voltage A linear regulator operating from VCC generates a 2.5-V supply for the internal circuits and the 1.26-V reference, which can source a maximum of 1 mA for external loads. A small ceramic capacitor (0.047 µF to 0.1 µF) between REF and ground is recommended to minimize noise pickup.
PAGE 5
SLVS423 A− MAY 2002 − REVISED SEPTEMBER 2002 error amplifier R1 and R2 should be tight-tolerance (±1% or better) devices with low and/or matched temperature coefficients to minimize output voltage errors. A device with a ±5% tolerance is suitable for R3. REF COMP R2 Compensation Network IN − IN + R1 _ To PWM + R3 Converter V Output O Figure 2.
PAGE 6
SLVS423 A− MAY 2002 − REVISED SEPTEMBER 2002 dead-time control (DTC) and soft start The two PWM channels have independent dead-time control inputs so that the maximum power-switch duty cycles can be limited to less then 100%. The dead-time is set with a voltage applied to DTC; the voltage is typically obtained from a resistive divider connected between the reference and ground as shown in Figure 4.
PAGE 7
SLVS423 A− MAY 2002 − REVISED SEPTEMBER 2002 short-circuit protection (SCP) (continued) The SCP time-out period must be greater than the converter start-up time or the converter will not start. Because high-value capacitor tolerances tend to be ± 20% or more and IC resistor tolerances are loose as well, it is best to choose an SCP time-out period 10-to-15 times greater than the converter startup time.
PAGE 8
SLVS423 A− MAY 2002 − REVISED SEPTEMBER 2002 recommended operating conditions Supply voltage, VCC Error amplifier common-mode input voltage MIN MAX 3.6 20 UNIT V −0.2 1.45 V Output voltage, VO 20 V Output current, IO ± 40 mA COMP source current −45 µA COMP sink current 100 µA 1 mA Reference output current COMP dc load resistance 100 kΩ Timing capacitor, CT 10 Timing resistor, RT 5.
PAGE 9
SLVS423 A− MAY 2002 − REVISED SEPTEMBER 2002 electrical characteristics over recommended operating free-air temperature range, VCC = 6 V, fosc = 500 kHz (unless otherwise noted) (continued) oscillator TL1454A PARAMETER fosc TEST CONDITIONS Frequency CT = 120 pF, RT = 10 kΩ VCC = 3.
PAGE 10
SLVS423 A− MAY 2002 − REVISED SEPTEMBER 2002 electrical characteristics over recommended operating free-air temperature range, VCC = 6 V, fosc = 500 kHz (unless otherwise noted) (continued) supply current TL1454A PARAMETER ICC(stby) Standby supply current ICC(average) Average supply current TEST CONDITIONS MIN RT open, CT = 1.5 V, No load, VO (COMP1, COMP2) = 1.
PAGE 11
SLVS423 A− MAY 2002 − REVISED SEPTEMBER 2002 electrical characteristics, VCC = 6 V, fosc = 500 kHz, TA = 25°C (unless otherwise noted) (continued) dead-time control (DTC) TL1454AY PARAMETER VIT Input threshold voltage VI(latched) Latched-mode input voltage TEST CONDITIONS MIN TYP Duty cycle = 0% 1.1 Duty cycle = 100% 0.5 Latched-mode (source) current MAX UNIT V 1.
PAGE 12
SLVS423 A− MAY 2002 − REVISED SEPTEMBER 2002 PARAMETER MEASUREMENT INFORMATION Oscillator COMP DTC 1.8 V 1.2 V 1V SCP Reference OUT1 H Dead-Time 100% L OUT2 H Dead-Time 100% L H SCP Comparator Output L 2.5 V 1V 0V SCP (tpe) VCC 2.9-V Typical Lockout threshold 0V Figure 5.
PAGE 13
SLVS423 A− MAY 2002 − REVISED SEPTEMBER 2002 TYPICAL CHARACTERISTICS OSCILLATOR FREQUENCY vs TIMING RESISTANCE 10 2 10 M VCC = 6 V RT = 5.
PAGE 14
SLVS423 A− MAY 2002 − REVISED SEPTEMBER 2002 TYPICAL CHARACTERISTICS DTC INPUT THRESHOLD VOLTAGE vs FREE-AIR TEMPERATURE 2 VCC = 6 V RT = 5.1 kΩ CT = 1000 pF VCC = 6 V TA = 25°C 1.2 t SCP − SCP Time-Out Period − s DTC Input Threshold Voltage − V 1.4 SCP TIME-OUT PERIOD vs SCP CAPACITANCE VIT (0% Duty Cycle) 1 0.8 0.6 VIT (100% Duty Cycle) 0.4 −50 1.5 1 0.
PAGE 15
SLVS423 A− MAY 2002 − REVISED SEPTEMBER 2002 TYPICAL CHARACTERISTICS UVLO THRESHOLD VOLTAGE vs FREE-AIR TEMPERATURE DUTY CYCLE vs DTC INPUT VOLTAGE 120 VCC = 6 V CT = 120 pF RT = 10 kΩ TA = 25°C VIT(H) 100 3 VIL(L) 80 2.5 Duty Cycle − % VIT(H) VIT(L) − UVLO Threshold Voltage − V 3.5 2 60 40 1.5 20 1 −50 −25 0 25 50 75 0 100 0.25 0 TA − Free-Air Temperature − °C 0.5 1 1.25 1.
PAGE 16
SLVS423 A− MAY 2002 − REVISED SEPTEMBER 2002 TYPICAL CHARACTERISTICS VO(PP) − Error Amplifier Maximum Peak-to-Peak Output Voltage Swing − V 2.5 VCC = 6 V TA = 25°C 2 1.5 1 0.5 0 1k 10 k 100 k 1M 10 M 100 M f − Frequency − Hz ERROR-AMPLIFIER MINIMUM OUTPUT VOLTAGE SWING vs FREE-AIR TEMPERATURE VOM+ − Error-Ampplifier Minimum Output Voltage Swing − V ERROR AMPLIFIER MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE SWING vs FREQUENCY 0.
PAGE 17
SLVS423 A− MAY 2002 − REVISED SEPTEMBER 2002 VOM+ − Error-Ampplifier Positive Output Voltage Swing − V TYPICAL CHARACTERISTICS ERROR-AMPLIFIER POSITIVE OUTPUT VOLTAGE SWING vs FREE-AIR TEMPERATURE 2.5 VCC = 6 V No Load Amplifier 1 2.45 2.4 ÁÁ ÁÁ ÁÁ 2.35 −50 −25 0 25 50 75 TA − Free-Air Temperature − °C 100 Figure 21 HIGH-LEVEL OUTPUT VOLTAGE vs OUTPUT CURRENT HIGH-LEVEL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE 6 5.
PAGE 18
SLVS423 A− MAY 2002 − REVISED SEPTEMBER 2002 TYPICAL CHARACTERISTICS LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE 6 250 VOL − Low-Level Output Voltage − mV VOL − Low-Level Output Voltage − V VCC = 6 V TA = 25°C 5 4 3 2 1 0 20 40 60 IOL − Low-Level Output Current − mA VCC = 6 V IO = 8 mA 200 150 100 50 0 −50 80 −25 0 25 50 75 TA − Free-Air Temperature − °C Figure 25
PAGE 19
SLVS423 A− MAY 2002 − REVISED SEPTEMBER 2002 TYPICAL CHARACTERISTICS STANDBY SUPPLY CURRENT vs SUPPLY VOLTAGE STANDBY SUPPLY CURRENT vs FREE-AIR TEMPERATURE 6 VCC = 6 V RT = Open CT = 1.5 V COMP1, COMP2 = 1.25 V No Load TA = 25°C 5 I CC(stby) − Standby Supply Current − mA I CC(stby) − Standby Supply Current − mA 6 4 3 2 5 10 15 20 4 3 2 1 − 50 1 0 5 VCC = 6 V CT = 1.5 V RT = Open COMP1, COMP2 = 1.
PAGE 20
SLVS423 A− MAY 2002 − REVISED SEPTEMBER 2002 TYPICAL CHARACTERISTICS REFERENCE VOLTAGE vs FREE-AIR TEMPERATURE 1.27 Vref − Reference Voltage − V VCC = 6 V IO = − 1 mA 1.26 1.25 1.24 1.
PAGE 21
PACKAGE OPTION ADDENDUM www.ti.
PAGE 22
PACKAGE OPTION ADDENDUM www.ti.com 16-Mar-2007 (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information.
PAGE 23
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TL1454ACDBR SSOP DB 16 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1 TL1454ACDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 TL1454ACDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.
PAGE 24
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TL1454ACDBR SSOP DB 16 2000 367.0 367.0 38.0 TL1454ACDR SOIC D 16 2500 367.0 367.0 38.0 TL1454ACDR SOIC D 16 2500 333.2 345.9 28.6 TL1454ACNSR SO NS 16 2000 367.0 367.0 38.0 TL1454ACPWR TSSOP PW 16 2000 367.0 367.0 35.
PAGE 25
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