Datasheet
TL16C2550
www.ti.com
SLWS161E –JUNE 2005–REVISED NOVEMBER 2012
1.8-V to 5-V DUAL UART WITH 16-BYTE FIFOS
Check for Samples: TL16C2550
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FEATURES
• Programmable Auto-RTS and Auto-CTS – Baud Generation (DC to 1 Mbit/s)
• In Auto-CTS Mode, CTS Controls Transmitter • False-Start Bit Detection
• In Auto-RTS Mode, RCV FIFO Contents, and • Complete Status Reporting Capabilities
Threshold Control RTS
• 3-State Output TTL Drive Capabilities for
• Serial and Modem Control Outputs Drive a Bidirectional Data Bus and Control Bus
RJ11 Cable Directly When Equipment Is on the
• Line Break Generation and Detection Internal
Same Power Drop
Diagnostic Capabilities:
• Capable of Running With All Existing
– Loopback Controls for Communications
TL16C450 Software
Link Fault Isolation
• After Reset, All Registers Are Identical to the
– Break, Parity, Overrun, and Framing Error
TL16C450 Register Set
Simulation
• Up to 24-MHz Clock Rate for up to 1.5-Mbaud
• Fully Prioritized Interrupt System Controls
Operation With VCC = 5 V
• Modem Control Functions (CTS, RTS, DSR,
• Up to 20-MHz Clock Rate for up to 1.25-Mbaud
DTR, RI, and DCD)
Operation With VCC = 3.3 V
• Available in 48-Pin TQFP (PFB) Package, 32-
• Up to 16-MHz Clock Rate for up to 1-Mbaud
Pin QFN (RHB), or 44-Pin PLCC (FN) Package
Operation With VCC = 2.5 V
• Pin Compatible with TL16C752B (48-Pin
• Up to 10-MHz Clock Rate for up to 625-kbaud
Package PFB)
Operation With VCC = 1.8 V
• In the TL16C450 Mode, Hold and Shift APPLICATIONS
Registers Eliminate the Need for Precise
• Point-of-Sale Terminals
Synchronization Between the CPU and Serial
• Gaming Terminals
Data
• Portable Applications
• Programmable Baud Rate Generator Allows
• Router Control
Division of Any Input Reference Clock by 1 to
• Cellular Data
(2 16 -1) and Generates an Internal 16 × Clock
• Factory Automation
• Standard Asynchronous Communication Bits
(Start, Stop, and Parity) Added to or Deleted
DESCRIPTION
From the Serial Data Stream
The TL16C2550 is a dual universal asynchronous
• 5-V, 3.3-V, 2.5-V, and 1.8-V Operation
receiver and transmitter (UART). It incorporates the
• Independent Receiver Clock Input
functionality of two TL16C550D UARTs, each UART
• Transmit, Receive, Line Status, and Data Set
having its own register set and FIFOs. The two
Interrupts Independently Controlled
UARTs share only the data bus interface and clock
source, otherwise they operate independently.
• Fully Programmable Serial Interface
Another name for the uart function is Asynchronous
Characteristics:
Communications Element (ACE), and these terms will
– 5-, 6-, 7-, or 8-Bit Characters
be used interchangeably. The bulk of this document
– Even-, Odd-, or No-Parity Bit Generation
describes the behavior of each ACE, with the
and Detection
understanding that two such devices are incorporated
into the TL16C2550.
– 1-, 1 1/2-, or 2-Stop Bit Generation
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2005–2012, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.