Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLinear ICsLinear IC - Op-amp Multi-purpose SOIC 14

 

   

SLVS461B − JANUARY 2003 − REVISED JULY 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Low Offset ...3 mV (Max) for A-Grade

D Wide Gain-Bandwidth Product ...4 MHz

D High Slew Rate . . . 13 V/µs

D Fast Settling Time . . . 1.1 µs to 0.1%

D Wide-Range Single-Supply Operation

...4 V to 36 V

D Wide Input Common-Mode Range Includes

Ground (V

CC−

)

D Low Total Harmonic Distortion . . . 0.02%

D Large-Capacitance Drive Capability

. . . 10,000 pF

D Output Short-Circuit Protection

D Alternative to MC33074/A and MC34074/A

description/ordering information

ORDERING INFORMATION

max

AT 25°C

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

PDIP (N) Tube of 25 TL3474ACN TL3474ACN

A-grade:

SOIC (D)

Tube of 50 TL3474ACD

TL3474A

A-grade:

3 mV

SOIC (D)

Reel of 2500 TL3474ACDR

TL3474A

3 mV

TSSOP (PW)

Tube of 90 TL3474ACPW

T3474A

0°C to 70°C

TSSOP (PW)

Reel of 2000 TL3474ACPWR

T3474A

0°C to 70°C

PDIP (N) Tube of 25 TL3474CN TL3474CN

Standard grade:

SOIC (D)

Tube of 50 TL3474CD

TL3474C

Standard grade:

10 mV

SOIC (D)

Reel of 2500 TL3474CDR

TL3474C

10 mV

TSSOP (PW)

Tube of 90 TL3474CPW

TL3474

TSSOP (PW)

Reel of 2000 TL3474CPWR

TL3474

PDIP (N) Tube of 25 TL3474AIN Z3474A

A-grade:

SOIC (D)

Tube of 50 TL3474AID

TL3474AI

A-grade:

3 mV

SOIC (D)

Reel of 2500 TL3474AIDR

TL3474AI

3 mV

TSSOP (PW)

Tube of 90 TL3474AIPW

Z3474A

−40°C to 105°C

TSSOP (PW)

Reel of 2000 TL3474AIPWR

Z3474A

−40°C to 105°C

PDIP (N) Tube of 25 TL3474IN TL3474IN

Standard grade:

SOIC (D)

Tube of 50 TL3474ID

TL3474I

Standard grade:

10 mV

SOIC (D)

Reel of 2500 TL3474IDR

TL3474I

10 mV

TSSOP (PW)

Tube of 90 TL3474IPW

Z3474

TSSOP (PW)

Reel of 2000 TL3474IPWR

Z3474

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

D, N, OR PW PACKAGE

(TOP VIEW)

1OUT

1IN−

1IN+

CC+

2IN+

2IN−

2OUT

4OUT

4IN−

4IN+

CC−

/GND

3IN+

3IN−

3OUT

  ! " #$%! "  &$'(#! )!%*

)$#!" # ! "&%##!" &% !+% !%"  %," "!$%!"

"!)) -!.* )$#! &#%""/ )%" ! %#%""(. #($)%

!%"!/  (( &%!%"*

Summary of content (19 pages)

PAGE 1
SLVS461B − JANUARY 2003 − REVISED JULY 2003 D D D D D D D D D D D, N, OR PW PACKAGE (TOP VIEW) Low Offset . . . 3 mV (Max) for A-Grade Wide Gain-Bandwidth Product . . . 4 MHz High Slew Rate . . . 13 V/µs Fast Settling Time . . . 1.1 µs to 0.1% Wide-Range Single-Supply Operation . . . 4 V to 36 V Wide Input Common-Mode Range Includes Ground (VCC−) Low Total Harmonic Distortion . . . 0.02% Large-Capacitance Drive Capability . . .
PAGE 2
SLVS461B − JANUARY 2003 − REVISED JULY 2003 description/ordering information (continued) Quality, low-cost, bipolar fabrication with innovative design concepts is employed for the TL3474, TL3474A operational amplifiers. These devices offer 4 MHz of gain-bandwidth product, 13-V/µs slew rate, and fast settling time without the use of JFET device technology.
PAGE 3
SLVS461B − JANUARY 2003 − REVISED JULY 2003 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage: VCC+ (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V VCC− . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 4
SLVS461B − JANUARY 2003 − REVISED JULY 2003 electrical characteristics at specified free-air temperature, VCC± = ±15 V (unless otherwise noted) PARAMETER VIO αVIO IIO Input offset current IIB Input bias current VOH VOL AVD VCC = 5 V Input offset voltage Temperature coefficient of input offset voltage VICR TEST CONDITIONS Common-mode input voltage range High-level output voltage Low-level output voltage Large-signal differentia
PAGE 5
SLVS461B − JANUARY 2003 − REVISED JULY 2003 operating characteristics, VCC± = ±15 V, TA = 25°C TL3474 PARAMETER TEST CONDITIONS SR+ Positive slew rate SR− Negative slew rate VI = −10 V to 10 V, RL = 2 kΩ, CL = 300 pF ts Settling time AVD = −1, 10-V step Vn Equivalent input noise voltage f = 1 kHz, In Equivalent input noise current THD AV = 1 MIN TYP 8 10 TL3474A MAX MIN TYP 8 10 MAX UNIT V/ s V/µs AV = −1 13 13 To
PAGE 6
SLVS461B − JANUARY 2003 − REVISED JULY 2003 TYPICAL CHARACTERISTICS (TA = 25°C UNLESS OTHERWISE NOTED) OUTPUT IMPEDANCE vs FREQUENCY 80 0.6 VCC± = ±15 V VCM = 0 V VO = 0 V ∆IO = ±0.5 mA 70 60 VCC± = ±15 V VO = 2 Vpp RL = 2 k 0.5 AV = 1000 50 THD − % Impedance − Ω TOTAL HARMONIC DISTORTION vs FREQUENCY 40 0.4 0.3 AV = 1000 30 0.2 20 AV = 100 AV = 100 10 0.
PAGE 7
SLVS461B − JANUARY 2003 − REVISED JULY 2003 TYPICAL CHARACTERISTICS (TA = 25°C UNLESS OTHERWISE NOTED) OFFSET VOLTAGE DRIFT vs TEMPERATURE SUPPLY CURRENT vs SUPPLY VOLTAGE 2.0 1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.
PAGE 8
SLVS461B − JANUARY 2003 − REVISED JULY 2003 TYPICAL CHARACTERISTICS (TA = 25°C UNLESS OTHERWISE NOTED) COMMON-MODE REJECTION vs FREQUENCY 120 VCC± = ±15 V VCM = 0 V ∆VCM = ±15 V 25°C 100 125°C −55°C CMRR − dB 80 60 40 55°C 25°C 125°C 20 0 10 100 1k 10 k 100 k Frequency − Hz Figure 9 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1M 10 M
PAGE 9
PACKAGE OPTION ADDENDUM www.ti.
PAGE 10
PACKAGE OPTION ADDENDUM www.ti.
PAGE 11
PACKAGE OPTION ADDENDUM www.ti.
PAGE 12
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TL3474ACDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 TL3474ACPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 TL3474AIDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.
PAGE 13
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TL3474ACDR SOIC D 14 2500 333.2 345.9 28.6 TL3474ACPWR TSSOP PW 14 2000 367.0 367.0 35.0 TL3474AIDR SOIC D 14 2500 333.2 345.9 28.6 TL3474AIPWR TSSOP PW 14 2000 367.0 367.0 35.0 TL3474CDR SOIC D 14 2500 333.2 345.9 28.6 TL3474CPWR TSSOP PW 14 2000 367.0 367.0 35.
PAGE 14
PAGE 15
PAGE 16
PAGE 17
PAGE 18
PAGE 19
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.