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TLC1549C, TLC1549I, TLC1549M

10-BIT ANALOG-TO-DIGITAL CONVERTERS

WITH SERIAL CONTROL

SLAS059C – DECEMBER 1992 – REVISED MARCH 1995

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

10-Bit-Resolution A/D Converter

Inherent Sample and Hold

Total Unadjusted Error...±1 LSB Max

On-Chip System Clock

Terminal Compatible With TLC549 and

TLV1549

CMOS Technology

description

The TLC1549C, TLC1549I, and TLC1549M

are 10-bit, switched-capacitor, successive-

approximation analog-to-digital converters.

These devices have two digital inputs and a

3-state output [chip select (CS

), input-output clock

(I/O CLOCK), and data output (DATA OUT)] that

provide a three-wire interface to the serial port of

a host processor.

The sample-and-hold function is automatic. The

converter incorporated in these devices features

differential high-impedance reference inputs that

facilitate ratiometric conversion, scaling, and

isolation of analog circuitry from logic and supply

noise. A switched-capacitor design allows low-

error conversion over the full operating free-air

temperature range.

The TLC1549C is characterized for operation from 0°C to 70°C. The TLC1549I is characterized for operation

from –40°C to 85°C. The TLC1549M is characterized for operation over the full military temperature range of

–55°C to 125°C.

AVAILABLE OPTIONS

PACKAGE

SMALL OUTLINE

(D)

CHIP CARRIER

(FK)

CERAMIC DIP

(JG)

PLASTIC DIP

(P)

0°C to 70°C TLC1549CD — — TLC1549CP

–40°C to 85°C TLC1549ID — — TLC1549IP

–55°C to 125°C — TLC1549MFK TLC1549MJG —

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

REF+

ANALOG IN

REF–

GND

I/O CLOCK

DATA OUT

D, JG, OR P PACKAGE

(TOP VIEW)

3212019

910111213

I/O CLOCK

DATA OUT

ANALOG IN

REF–

FK PACKAGE

(TOP VIEW)

REF+

GND

NC – No internal connection

Summary of content (17 pages)

PAGE 1
TLC1549C, TLC1549I, TLC1549M 10-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL SLAS059C – DECEMBER 1992 – REVISED MARCH 1995 D D D D D D 10-Bit-Resolution A/D Converter Inherent Sample and Hold Total Unadjusted Error . . .
PAGE 2
TLC1549C, TLC1549I, TLC1549M 10-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL SLAS059C – DECEMBER 1992 – REVISED MARCH 1995 functional block diagram REF + 1 REF – 3 10-Bit Analog-to-Digital Converter (switched capacitors) 10 2 ANALOG IN 10 Output Data Register Sample and Hold 10-to-1 Data Selector and Driver 6 DATA OUT 4 System Clock, Control Logic, and I/O Counters 7 I/O CLOCK CS 5 Terminal numbers shown are for the D, JG, and P packages only.
PAGE 3
TLC1549C, TLC1549I, TLC1549M 10-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL SLAS059C – DECEMBER 1992 – REVISED MARCH 1995 Terminal Functions TERMINAL NAME NO. I/O DESCRIPTION ANALOG IN 2 I Analog signal input. The driving source impedance should be ≤ 1 kΩ. The external driving source to ANALOG IN should have a current capability ≥ 10 mA. CS 5 I Chip select.
PAGE 4
TLC1549C, TLC1549I, TLC1549M 10-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL SLAS059C – DECEMBER 1992 – REVISED MARCH 1995 detailed description Table 1. Mode Operation MODES Fast Modes Slow Modes NO.
PAGE 5
TLC1549C, TLC1549I, TLC1549M 10-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL SLAS059C – DECEMBER 1992 – REVISED MARCH 1995 mode 5: slow mode, CS inactive (high) between transfers, 11- to 16-clock transfer In this mode, CS is inactive (high) between serial I/O CLOCK transfers and each transfer can be 11 to 16 clocks long. The falling edge of CS begins the sequence by removing DATA OUT from the high-impedance state.
PAGE 6
TLC1549C, TLC1549I, TLC1549M 10-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL SLAS059C – DECEMBER 1992 – REVISED MARCH 1995 SC Threshold Detector 512 NODE 512 REF – 256 128 16 REF+ REF+ REF+ REF – ST REF – ST REF – ST 8 4 REF+ REF – ST REF+ REF – ST 2 1 REF+ REF+ REF – ST REF – ST To Output Latches 1 REF – ST ST VI Figure 1.
PAGE 7
TLC1549C, TLC1549I, TLC1549M 10-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL SLAS059C – DECEMBER 1992 – REVISED MARCH 1995 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC (see Note 1): TLC1549C, TLC1549I . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 6.5 V TLC1549M . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 6 V Input voltage range, VI (any input) . . . . . . . . . . . . . . . . .
PAGE 8
TLC1549C, TLC1549I, TLC1549M 10-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL SLAS059C – DECEMBER 1992 – REVISED MARCH 1995 electrical characteristics over recommended operating free-air temperature range, VCC = Vref+ = 4.5 V to 5.5 V, I/O CLOCK frequency = 2.1 MHz (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP† MAX 2.4 UNIT VOH High level output voltage High-level VCC = 4.5 V, VCC = 4.5 V to 5.5 V, IOH = – 1.6 mA IOH = – 20 µA VOL Low level output voltage Low-level VCC = 4.
PAGE 9
TLC1549C, TLC1549I, TLC1549M 10-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL SLAS059C – DECEMBER 1992 – REVISED MARCH 1995 operating characteristics over recommended operating free-air temperature range, VCC = Vref+ = 4.5 V to 5.5 V, I/O CLOCK frequency = 2.
PAGE 10
TLC1549C, TLC1549I, TLC1549M 10-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL SLAS059C – DECEMBER 1992 – REVISED MARCH 1995 PARAMETER MEASUREMENT INFORMATION VCC Test Point RL = 2.18 kΩ DATA OUT 12 kΩ CL = 100 pF Figure 2. Load Circuit 2V CS 0.8 V tPZH, tPZL DATA OUT tPHZ, tPLZ 2.4 V 90% 0.4 V 10% Figure 3. DATA OUT to Hi-Z Voltage Waveforms 2V CS 0.8 V tsu(CS) th(CS) I/O CLOCK 0.8 V First Clock Last Clock 0.8 V Figure 4.
PAGE 11
TLC1549C, TLC1549I, TLC1549M 10-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL SLAS059C – DECEMBER 1992 – REVISED MARCH 1995 CS (see Note A) I/O CLOCK 1 2 3 4 5 6 7 8 9 10 Sample Cycle B ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ 1 Hi-Z State DATA OUT A9 A8 A7 A6 A5 A4 A3 A2 A1 Previous Conversion Data MSB A0 B9 A/D Conversion Interval (≤ 21 µs) Initialize LSB Initialize Figure 6.
PAGE 12
TLC1549C, TLC1549I, TLC1549M 10-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL SLAS059C – DECEMBER 1992 – REVISED MARCH 1995 Must Be High on Power Up CS (see Note A) I/O CLOCK 1 2 3 4 5 6 7 8 9 10 14 15 1 16 Sample Cycle B DATA OUT A9 A8 A7 A6 A5 A4 A3 See Note C A2 A1 Previous Conversion Data MSB Low Level A0 B9 A/D Conversion Interval (≤ 21 µs) LSB Initialize Initialize Figure 9.
PAGE 13
TLC1549C, TLC1549I, TLC1549M 10-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL SLAS059C – DECEMBER 1992 – REVISED MARCH 1995 APPLICATION INFORMATION 1023 1111111111 See Notes A and B 1111111110 1022 1111111101 1021 VFT = VFS – 1/2 LSB 513 1000000001 512 1000000000 VZT =VZS + 1/2 LSB Step Digital Output Code VFS 511 0111111111 VZS 0000000001 1 0000000000 0 0.0048 0.0096 2.4528 2.4576 2.4624 4.9056 4.9080 2 0.0024 0000000010 4.9104 0 4.
PAGE 14
TLC1549C, TLC1549I, TLC1549M 10-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL SLAS059C – DECEMBER 1992 – REVISED MARCH 1995 APPLICATION INFORMATION simplified analog input analysis Using the equivalent circuit in Figure 14, the time required to charge the analog input capacitance from 0 V to VS within 1/2 LSB can be derived as follows: ǒ Ǔ The capacitance charging voltage is given by V C + VS 1–e–tcńRtCi where (1) Rt = Rs + ri The final voltage to 1/2 LSB is given by VC (1/2 LSB) = VS – (VS
PAGE 15
PACKAGE OPTION ADDENDUM www.ti.
PAGE 16
PACKAGE OPTION ADDENDUM www.ti.com 24-Jan-2013 Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
PAGE 17
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