Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLinear ICsLinear IC - Op-amp Multi-purpose SOIC 14

    

    

SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Trimmed Offset Voltage:

TLC279 . . . 900 µV Max at 25°C,

= 5 V

D Input Offset Voltage Drift ...Typically

0.1 µV/Month, Including the First 30 Days

D Wide Range of Supply Voltages Over

Specified Temperature Range:

0°C to 70°C...3 V to 16 V

−40°C to 85°C...4 V to 16 V

−55°C to 125°C...4 V to 16 V

D Single-Supply Operation

D Common-Mode Input Voltage Range

Extends Below the Negative Rail (C-Suffix

and I-Suffix Versions)

D Low Noise ...Typically 25 nV/√Hz

at f = 1 kHz

D Output Voltage Range Includes Negative

Rail

D High Input Impedance ...10

Ω Typ

D ESD-Protection Circuitry

D Small-Outline Package Option Also

Available in Tape and Reel

D Designed-In Latch-Up Immunity

description

The TLC274 and TLC279 quad operational

amplifiers combine a wide range of input offset

voltage grades with low offset voltage drift, high

input impedance, low noise, and speeds

approaching that of general-purpose BiFET

devices.

These devices use Texas Instruments silicon-

gate LinCMOS technology, which provides

offset voltage stability far exceeding the stability

available with conventional metal-gate

processes.

The extremely high input impedance, low bias

currents, and high slew rates make these

cost-effective devices ideal for applications which

have previously been reserved for BiFET and

NFET products. Four offset voltage grades are

available (C-suffix and I-suffix types), ranging

from the low-cost TLC274 (10 mV) to the high-

precision TLC279 (900 µV). These advantages, in

combination with good common-mode rejection

and supply voltage rejection, make these devices

a good choice for new state-of-the-art designs as

well as for upgrading existing designs.

   ! "#$ !  %#&'" ($)

(#"! "  !%$""! %$ *$ $!  $+! !#$!

!(( ,-) (#" %"$!!. ($!  $"$!!'- "'#($

$!.  '' %$$!)

−1200

Percentage of Units − %

− Input Offset Voltage − µV

1200

−600 0 600

= 5 V

= 25°C

N Package

DISTRIBUTION OF TLC279

INPUT OFFSET VOLTAGE

1OUT

1IN−

1IN+

2IN+

2IN−

2OUT

4OUT

4IN−

4IN+

GND

3IN+

3IN−

3OUT

D, J, N, OR PW PACKAGE

(TOP VIEW)

3212019

910111213

4IN+

GND

3IN+

1IN+

2IN+

FK PACKAGE

(TOP VIEW)

1IN −

1OUT

3OUT

3IN −

4OUT

4IN −

2IN −

2OUT

NC − No internal connection

290 Units Tested From 2 Wafer Lots

LinCMOS is a trademark of Texas Instruments.

Summary of content (53 pages)

PAGE 1
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 D Trimmed Offset Voltage: D D D D D D D D 1OUT 1IN − 1IN + VDD 2IN + 2IN − 2OUT 1 14 2 13 3 12 4 11 5 10 6 9 7 8 4OUT 4IN − 4IN + GND 3IN + 3IN − 3OUT FK PACKAGE (TOP VIEW) 1IN − 1OUT NC 4OUT 4IN − D D, J, N, OR PW PACKAGE (TOP VIEW) 1IN + NC VDD NC 2IN + 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 4IN + NC GND NC 3IN + 2IN − 2OUT NC
PAGE 2
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 description (continued) In general, many features associated with bipolar technology are available on LinCMOS operational amplifiers, without the power penalties of bipolar technology. General applications such as transducer interfacing, analog calculations, amplifier blocks, active filters, and signal buffering are easily designed with the TLC274 and TLC279.
PAGE 3
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 equivalent schematic (each amplifier) VDD P3 P4 R6 R1 R2 IN − N5 P5 P6 P2 P1 IN + C1 R5 OUT N3 N1 R3 N4 N2 D1 R4 N6 N7 R7 D2 GND POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3
PAGE 4
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 TLC274Y chip information These chips, when properly assembled, display characteristics similar to the TLC274C. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform.
PAGE 5
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 6
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA† TLC274C, TLC274AC, TLC274BC, TLC279C MIN TLC274C VIO VO = 1.4 V, RS = 50 Ω, VIC = 0, RL = 10 kΩ TLC274AC VO = 1.4 V, RS = 50 Ω, VIC = 0, RL = 10 kΩ TLC274BC VO = 1.4 V, RS = 50 Ω, VIC = 0, RL = 10 kΩ TLC279C VO = 1.
PAGE 7
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA† TLC274C, TLC274AC, TLC274BC, TLC279C MIN TLC274C VIO VO = 1.4 V, RS = 50 Ω, TLC274AC VO = 1.4 V, RS = 50 Ω, VIC = 0, RL = 10 kΩ TLC274BC VO = 1.4 V, RS = 50 Ω, VIC = 0, RL = 10 kΩ TLC279C VO = 1.
PAGE 8
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA† TLC274I, TLC274AI, TLC274BI, TLC279I MIN TLC274I VIO VO = 1.4 V, RS = 50 Ω, VIC = 0, RL = 10 kΩ TLC274AI VO = 1.4 V, RS = 50 Ω, VIC = 0, RL = 10 kΩ TLC274BI VO = 1.4 V, RS = 50 Ω, VIC = 0, RL = 10 kΩ TLC279I VO = 1.
PAGE 9
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA† TLC274I, TLC274AI, TLC274BI, TLC279I MIN TLC274I VIO VO = 1.4 V, RS = 50 Ω, VIC = 0, RL = 10 kΩ TLC274AI VO = 1.4 V, RS = 50 Ω, VIC = 0, RL = 10 kΩ TLC274BI VO = 1.4 V, RS = 50 Ω, VIC = 0, RL = 10 kΩ TLC279I VO = 1.
PAGE 10
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER VIO TEST CONDITIONS VO = 1.4 V, RS = 50 Ω, VIC = 0, RL = 10 kΩ Full range TLC279M VO = 1.4 V, RS = 50 Ω, VIC = 0, RL = 10 kΩ Full range Input offset voltage Average temperature coefficient of input offset voltage IIO Input offset current (see Note 4) VO = 2.
PAGE 11
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 electrical characteristics at specified free-air temperature, VDD = 10 V (unless) otherwise noted) PARAMETER VIO TEST CONDITIONS TLC274M VO = 1.4 V, RS = 50 Ω, VIC = 0, RL = 10 kΩ TLC279M VO = 1.
PAGE 12
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 operating characteristics at specified free-air temperature, VDD = 5 V PARAMETER TEST CONDITIONS TA TLC274C, TLC274AC, TLC274AC, TLC274BC, TLC279C MIN SR Slew rate at unity gain RL = 10 Ω,, CL = 20 PF, See Figure 1 VIPP = 1 V VIPP = 2.
PAGE 13
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 operating characteristics at specified free-air temperature, VDD = 5 V PARAMETER TEST CONDITIONS TA TLC274I, TLC274AI, TLC274BI, TLC279I MIN VIPP = 1 V SR Slew rate at unity gain RL = 10 kΩ, k , CL = 20 PF, See Figure 1 VIPP = 2.
PAGE 14
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 operating characteristics at specified free-air temperature, VDD = 5 V PARAMETER TLC274M, TLC279M TEST CONDITIONS VIPP = 1 V SR Slew rate at unity gain RL = 10 kΩ, k , CL = 20 PF, See Figure 1 VIPP = 2.
PAGE 15
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 electrical characteristics, VDD = 5 V, TA = 25°C (unless otherwise noted) TLC274Y PARAMETER TEST CONDITIONS VIO Input offset voltage IIO IIB Input offset current (see Note 4) VICR Common-mode input voltage range (see Note 5) VOH VOL High-level output voltage AVD CMRR Large-signal differential voltage amplification kSVR Supply-voltage rejection ratio (∆VDD /∆VIO)
PAGE 16
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 operating characteristics, VDD = 5 V, TA = 25°C TLC274Y PARAMETER TEST CONDITIONS MAX UNIT 3.6 RS = 20 Ω, See Figure 2 25 nV/√Hz CL = 20 PF, RL = 10 kΩ, 320 kHz CL = 20 PF, See Figure 3 1.
PAGE 17
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 PARAMETER MEASUREMENT INFORMATION single-supply versus split-supply test circuits Because the TLC274 and TLC279 are optimized for single-supply operation, circuit configurations used for the various tests often present some inconvenience since the input signal, in many cases, must be offset from ground.
PAGE 18
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 PARAMETER MEASUREMENT INFORMATION input bias current Because of the high input impedance of the TLC274 and TLC279 operational amplifiers, attempts to measure the input bias current can result in erroneous readings. The bias current at normal room ambient temperature is typically less than 1 pA, a value that is easily exceeded by leakages on the test socket.
PAGE 19
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 PARAMETER MEASUREMENT INFORMATION full-power response Full-power response, the frequency above which the operational amplifier slew rate limits the output voltage swing, is often specified two ways: full-linear response and full-peak response.
PAGE 20
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 TYPICAL CHARACTERISTICS Table of Graphs FIGURE 20 VIO αVIO Input offset voltage Distribution 6, 7 Temperature coefficient of input offset voltage Distribution 8, 9 VOH High-level output voltage vs High-level output current vs Supply voltage vs Free-air temperature 10, 11 12 13 VOL Low-level output voltage vs Common-mode input voltage vs Differential input volt
PAGE 21
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 TYPICAL CHARACTERISTICS DISTRIBUTION OF TLC274 INPUT OFFSET VOLTAGE DISTRIBUTION OF TLC274 INPUT OFFSET VOLTAGE Percentage of Units − % 50 ÑÑÑÑÑÑÑÑÑÑÑÑ ÑÑÑÑÑÑÑÑÑÑÑÑ ÑÑÑÑÑÑÑÑÑÑÑÑ ÑÑÑÑÑÑÑÑÑÑÑÑ 60 753 Amplifiers Tested From 6 Wafer Lots VDD = 5 V TA= 25°C N Package 753 Amplifiers Tested From 6 Wafer Lots VDD = 10 V TA = 25°C N Package 50 Percentage of Units − % 60 40
PAGE 22
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 TYPICAL CHARACTERISTICS† HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT Q HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT 16 VID = 100 mV TA = 25°C 4 VDD = 5 V 3 VDD = 4 V VDD = 3 V 2 1 0 VDD = 16 V 12 10 8 VDD = 10 V 6 4 2 0 0 −2 −4 −6 −8 −10 0 −10 −15 −5 IOH − High-Level Output Current − mA −20 −25 −30 −35 Figure 11 HIGH-LEVEL OUTPUT V
PAGE 23
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 TYPICAL CHARACTERISTICS† LOW-LEVEL OUTPUT VOLTAGE vs COMMON-MODE INPUT VOLTAGE LOW-LEVEL OUTPUT VOLTAGE vs COMMON-MODE INPUT VOLTAGE 500 VDD = 5 V IOL = 5 mA TA = 25°C 650 VOL − Low-Level Output Voltage − mV VOL − Low-Level Output Voltage − mV 700 600 550 VID = − 100 mV 500 450 400 VID = − 1 V 350 450 400 VID = − 100 mV 0 1 2 3 VIC − Common-Mode Input Voltage − V
PAGE 24
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 TYPICAL CHARACTERISTICS† LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 1 3 VOL − Low-Level Output Voltage − V 0.9 0.8 VOL − Low-Level Output Voltage − V VID = − 1 V VIC = 0.5 V TA = 25°C VDD = 5 V 0.7 VDD = 4 V 0.6 VDD = 3 V 0.5 0.4 0.3 0.2 0.1 0 0 1 2 3 4 5 6 7 IOL − Low-Level Output Current − mA 2.
PAGE 25
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 TYPICAL CHARACTERISTICS† COMMON-MODE INPUT VOLTAGE POSITIVE LIMIT vs SUPPLY VOLTAGE 10000 VDD = 10 V VIC = 5 V See Note A 16 ÑÑÑ ÑÑÑ 1000 IIB 100 VIC − Common-Mode Input Voltage − V I IB and I IO − Input Bias and Offset Currents − pA INPUT BIAS CURRENT AND INPUT OFFSET CURRENT vs FREE-AIR TEMPERATURE ÑÑ ÑÑ IIO 10 1 0.
PAGE 26
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 TYPICAL CHARACTERISTICS† SLEW RATE vs SUPPLY VOLTAGE SLEW RATE vs FREE-AIR TEMPERATURE 8 6 5 7 VDD = 10 V VIPP = 5.5 V 6 SR − Slew Rate − V/ µs 7 SR − Slew Rate − V/ µs ÑÑÑÑÑ ÑÑÑÑÑ 8 AV = 1 VIPP = 1 V RL = 10 k Ω CL = 20 pF TA = 25°C See Figure 1 4 3 2 VDD = 10 V VIPP = 1 V 5 4 3 VDD = 5 V VIPP = 1 V 2 1 VDD = 5 V VIPP = 2.
PAGE 27
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 TYPICAL CHARACTERISTICS† UNITY-GAIN BANDWIDTH vs FREE-AIR TEMPERATURE UNITY-GAIN BANDWIDTH vs SUPPLY VOLTAGE 3 2.5 B1 − Unity-Gain Bandwidth − MHz B1 − Unity-Gain Bandwidth − MHz VDD = 5 V VI = 10 mV CL = 20 pF See Figure 3 2.5 2 1.5 1 −75 VI = 10 mV CL = 20 pF TA = 25°C See Figure 3 2 1.
PAGE 28
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 TYPICAL CHARACTERISTICS† LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE SHIFT vs FREQUENCY 107 VDD = 10 V RL = 10 k Ω TA = 25°C ÁÁ ÁÁ ÁÁ 105 0° 104 30° AVD 103 60° 102 90° Phase Shift 10 120° 1 150° 0.
PAGE 29
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 TYPICAL CHARACTERISTICS PHASE MARGIN vs LOAD CAPACITANCE EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY VDD = 5 V VI = 10 mV TA = 25°C See Figure 3 φ m − Phase Margin 45° 40° 35° 30° 25° 0 10 20 30 40 50 60 70 80 CL − Capacitive Load − pF 90 100 Vn − Equivalent Input Noise Voltage − nV/ Hz 400 50° VDD = 5 V RS = 20 Ω TA = 25°C See Figure 2 300 200 100 0 1 1
PAGE 30
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 APPLICATION INFORMATION single-supply operation While the TLC274 and TLC279 perform well using dual power supplies (also called balanced or split supplies), the design is optimized for single-supply operation. This design includes an input common-mode voltage range that encompasses ground as well as an output voltage range that pulls down to ground.
PAGE 31
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 APPLICATION INFORMATION input characteristics The TLC274 and TLC279 are specified with a minimum and a maximum input voltage that, if exceeded at either input, could cause the device to malfunction. Exceeding this specified range is a common problem, especially in single-supply operation.
PAGE 32
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 APPLICATION INFORMATION output characteristics (continued) (a) CL = 20 pF, RL = NO LOAD (b) CL = 130 pF, RL = NO LOAD 2.5 V − VO + VI CL TA = 25°C f = 1 kHz VIPP = 1 V −2.5 V (c) CL = 150 pF, RL = NO LOAD (d) TEST CIRCUIT Figure 41.
PAGE 33
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 APPLICATION INFORMATION output characteristics (continued) VDD C + IP RP VO − − VI IF Rp = + R2 R1 VO IL RL VDD − VO IF + IL + IP Figure 43. Compensation for Input Capacitance IP = Pullup current required by the operational amplifier (typically 500 µA) Figure 42.
PAGE 34
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 APPLICATION INFORMATION 10 kΩ 10 kΩ 0.016 µF − 10 kΩ 1/4 TLC274 10 kΩ 1/4 TLC274 5V − 10 kΩ − VI 0.016 µF 1/4 TLC274 Low Pass + + + HIgh Pass 5 kΩ Band Pass R = 5 kΩ (3/d−1) (see Note A) NOTE A: d = damping factor, 1/Q Figure 44. State-Variable Filter 12 V VI + 1/4 TLC274 H.P. 5082 - 2835 + 1/4 TLC274 − 0.5 µF Mylar N.O. Reset − Figure 45.
PAGE 35
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 APPLICATION INFORMATION VI (see Note A) 100 kΩ 1.2 kΩ 4.7 kΩ − TL431 1 kΩ 1/4 TLC274 20 kΩ 0.1 µF 0.47 µF TIP31 15 Ω + TIS193 250 µF, 25 V + − VO (see Note B) 10 kΩ 47 kΩ 0.01 µF 110 Ω 22 kΩ NOTES: B. VI = 3.5 V to 15 V C. VO = 2 V, 0 to 1 A Figure 46. Logic-Array Power Supply VO (see Note A) 9V 10 kΩ 0.
PAGE 36
 SLOS092D − SEPTEMBER 1987 − REVISED MARCH 2001 APPLICATION INFORMATION 5V VI − + 10 kΩ 1/4 TLC279 100 kΩ − − 1/4 TLC279 VO + 10 kΩ − 10 kΩ 1/4 TLC279 R1, 10 kΩ (see Note A) + VI + 95 kΩ −5 V NOTE C: CMRR adjustment must be noninductive. Figure 48. Low-Power Instrumentation Amplifier 5V − R 10 MΩ R 10 MΩ 1/4 TLC274 VO + VI 2C 540 pF f NOTCH + R/2 5 MΩ C 270 pF 1 2pRC C 270 pF Figure 49.
PAGE 37
PACKAGE OPTION ADDENDUM www.ti.
PAGE 38
PACKAGE OPTION ADDENDUM www.ti.
PAGE 39
PACKAGE OPTION ADDENDUM www.ti.
PAGE 40
PACKAGE OPTION ADDENDUM www.ti.
PAGE 41
PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production.
PAGE 42
PACKAGE MATERIALS INFORMATION www.ti.com 3-Jul-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TLC274ACDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 TLC274AIDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 TLC274BCDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 TLC274BIDR SOIC D 14 2500 330.
PAGE 43
PACKAGE MATERIALS INFORMATION www.ti.com 3-Jul-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TLC274ACDR SOIC D 14 2500 367.0 367.0 38.0 TLC274AIDR SOIC D 14 2500 367.0 367.0 38.0 TLC274BCDR SOIC D 14 2500 367.0 367.0 38.0 TLC274BIDR SOIC D 14 2500 367.0 367.0 38.0 TLC274CDBR SSOP DB 14 2000 367.0 367.0 38.0 TLC274CDR SOIC D 14 2500 367.0 367.0 38.0 TLC274CDR SOIC D 14 2500 333.
PAGE 44
PAGE 45
PAGE 46
PAGE 47
PAGE 48
PAGE 49
PAGE 50
PAGE 51
PAGE 52
MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
PAGE 53
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.