Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLinear ICsLinear IC - Op-amp Multi-purpose PDIP 8

   

    

SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Trimmed Offset Voltage:

TLC27L7 . . . 500 µV Max at 25°C,

= 5 V

D Input Offset Voltage Drift . . . Typically

0.1 µV/Month, Including the First 30 Days

D Wide Range of Supply Voltages Over

Specified Temperature Range:

0°C to 70°C...3 V to 16 V

−40°C to 85°C...4 V to 16 V

−55°C to 125°C...4 V to 16 V

D Single-Supply Operation

D Common-Mode Input Voltage Range

Extends Below the Negative Rail (C-Suffix,

I-Suffix Types)

D Ultra-Low Power ...Typically 95 µW

at 25°C, V

= 5 V

D Output Voltage Range Includes Negative

Rail

D High Input Impedance ...10

Ω Typ

D ESD-Protection Circuitry

D Small-Outline Package Option Also

Available in Tape and Reel

D Designed-In Latch-Up immunity

description

The TLC27L2 and TLC27L7 dual operational

amplifiers combine a wide range of input offset

voltage grades with low offset voltage drift, high

input impedance, extremely low power, and high

gain.

AVAILABLE OPTIONS

PACKAGE

max

AT 25°C

SMALL

OUTLINE

(D)

CHIP

CARRIER

(FK)

CERAMIC

DIP

(JG)

PLASTIC

DIP

(P)

0°C

500 µV

TLC27L7CD

TLC27L7CP

0°C

500 µV

2 mV

TLC27L7CD

TLC27L2BCD

—

TLC27L7CP

TLC27L2BCP

70°C

2 mV

5 mV

TLC27L2BCD

TLC27L2ACD

— —

TLC27L2BCP

TLC27L2ACP

5 mV

10 mV

TLC27L2ACD

TLC27L2CD

TLC27L2ACP

TLC27L2CP

−40°C

500 µV

TLC27L7ID

TLC27L7IP

−40°C

500 µV

2 mV

TLC27L7ID

TLC27L2BID

—

TLC27L7IP

TLC27L2BIP

85°C

2 mV

5 mV

TLC27L2BID

TLC27L2AID

— —

TLC27L2BIP

TLC27L2AIP

5 mV

10 mV

TLC27L2AID

TLC27L2ID

TLC27L2AIP

TLC27L2IP

−55°C

500 µV

TLC27L7MD

TLC27L2MD

TLC27L7MFK

TLC27L7MJG

TLC27L7MP

125°C

500 µV

10 mV

TLC27L2MD

TLC27L2MDRG4

TLC27L7MFK

TLC27L2MFK

TLC27L7MJG

TLC27L2MJG

TLC27L7MP

TLC27L2MP

The D package is available taped and reeled. Add R suffix to the device type

(e.g., TLC27L7CDR).

       !"# $%

$   ! ! &   ' 

$$ ()% $ !* $  #) #$

*  ## !%

LinCMOS is a trademark of Texas Instruments.

−800

Percentage of Units − %

− Input Offset Voltage − µV

800

−400 0 400

DISTRIBUTION OF TLC27L7

INPUT OFFSET VOLTAGE

1OUT

1IN−

1IN+

GND

2OUT

2IN−

2IN+

D, JG, OR P PACKAGE

(TOP VIEW)

3 2 1 20 19

910111213

2OUT

2IN−

1IN−

1IN+

FK PACKAGE

(TOP VIEW)

1OUT

GND

NC − No internal connection

2IN +

335 Units Tested From 2 Wafer Lots

= 5 V

= 25°C

P Package

Summary of content (49 pages)

PAGE 1
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 D Trimmed Offset Voltage: D, JG, OR P PACKAGE (TOP VIEW) TLC27L7 . . . 500 µV Max at 25°C, VDD = 5 V Input Offset Voltage Drift . . . Typically 0.1 µV/Month, Including the First 30 Days Wide Range of Supply Voltages Over Specified Temperature Range: 0°C to 70°C . . . 3 V to 16 V −40°C to 85°C . . . 4 V to 16 V −55°C to 125°C . . .
PAGE 2
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 description (continued) These devices use Texas Instruments silicon-gate LinCMOS technology, which provides offset voltage stability far exceeding the stability available with conventional metal-gate processes.
PAGE 3
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Differential input voltage (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 4
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA† TLC27L2C TLC27L2AC TLC27L2BC TLC27L7C MIN TLC27L2C VIO VO = 1.4 V, RS = 50 Ω, VIC = 0, RL = 1 MΩ VIC = 0, RL = 1 MΩ Full range TLC27L2BC VO = 1.4 V, RS = 50 Ω, VIC = 0, RL = 1 MΩ Full range TLC27L7C VO = 1.
PAGE 5
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA† TLC27L2C TLC27L2AC TLC27L2BC TLC27L7C MIN VO = 1.4 V, RS = 50 Ω, TLC27L2C VIO VIC = 0, RL = 1 MΩ 25°C MAX 1.1 10 12 25°C VO = 1.4 V, RS = 50 Ω, VIC = 0, RL = 1 MΩ Full range TLC27L2BC VO = 1.
PAGE 6
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA† TLC27L2I TLC27L2AI TLC27L2BI TLC27L7I MIN VO = 1.4 V, RS = 50 Ω, TLC27L2I VIO VIC = 0, RL = 1 MΩ VIC = 0, RL = 1 MΩ Full range TLC27L2BI VO = 1.4 V, RS = 50 Ω, VIC = 0, RL = 1 MΩ Full range TLC27L7I VO = 1.
PAGE 7
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA† TLC27L2I TLC27L2AI TLC27L2BI TLC27L7I MIN TLC27L2I VIO VO = 1.4 V, RS = 50 Ω, VIC = 0, RL = 1 MΩ VIC = 0, RL = 1 MΩ Full range TLC27L2BI VO = 1.4 V, RS = 50 Ω, VIC = 0, RL = 1 MΩ Full range TLC27L7I VO = 1.
PAGE 8
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA† TLC27L2M TLC27L7M MIN VIO VO = 1.4 V, RS = 50 Ω, VIC = 0, RL = 1 MΩ Full range TLC27L7M VO = 1.
PAGE 9
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA† TLC27L2M TLC27L7M MIN VIO VO = 1.4 V, RS = 50 Ω, VIC = 0, RL = 1 MΩ Full range TLC27L7M VO = 1.
PAGE 10
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 operating characteristics, VDD = 5 V PARAMETER TEST CONDITIONS TA TLC27L2C TLC27L2AC TLC27L2BC TLC27L7C MIN VI(PP) = 1 V SR RL = 1 MΩ, M , CL = 20 pF, See Figure 1 Slew rate at unity gain VI(PP) = 2.
PAGE 11
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 operating characteristics, VDD = 5 V PARAMETER TEST CONDITIONS TA TLC27L2I TLC27L2AI TLC27L2BI TLC27L7I MIN VI(PP) = 1 V SR RL = 1 MΩ, M , CL = 20 pF, See Figure 1 Slew rate at unity gain VI(PP) = 2.
PAGE 12
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 operating characteristics, VDD = 5 V PARAMETER TEST CONDITIONS TA TLC27L2M TLC27L7M MIN VI(PP) = 1 V SR RL = 1 MΩ, M , CL = 20 pF, See Figure 1 Slew rate at unity gain VI(PP) = 2.
PAGE 13
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 PARAMETER MEASUREMENT INFORMATION single-supply versus split-supply test circuits Because the TLC27L2 and TLC27L7 are optimized for single-supply operation, circuit configurations used for the various tests often present some inconvenience since the input signal, in many cases, must be offset from ground.
PAGE 14
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 PARAMETER MEASUREMENT INFORMATION input bias current Because of the high input impedance of the TLC27L2 and TLC27L7 operational amplifiers, attempts to measure the input bias current can result in erroneous readings. The bias current at normal room ambient temperature is typically less than 1 pA, a value that is easily exceeded by leakages on the test socket.
PAGE 15
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 PARAMETER MEASUREMENT INFORMATION full-power response Full-power response, the frequency above which the operational amplifier slew rate limits the output voltage swing, is often specified two ways: full-linear response and full-peak response.
PAGE 16
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 TYPICAL CHARACTERISTICS Table of Graphs FIGURE 16 VIO αVIO Input offset voltage Distribution 6, 7 Temperature coefficient of input offset voltage Distribution 8, 9 VOH High-level output voltage vs High-level output current vs Supply voltage vs Free-air temperature 10, 11 12 13 VOL Low-level output voltage vs Differential input voltage vs Free-air temperature vs Low-le
PAGE 17
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 TYPICAL CHARACTERISTICS DISTRIBUTION OF TLC27L2 INPUT OFFSET VOLTAGE DISTRIBUTION OF TLC27L2 INPUT OFFSET VOLTAGE 70 70 905 Amplifiers Tested From 6 Wafer Lots VDD = 5 V TA = 25°C P Package 60 Percentage of Units − % Percentage of Units − % 60 905 Amplifiers Tested From 6 Wafer Lots VDD = 10 V TA = 25°C P Package 50 40 30 20 50 40 30 20 10 10 0 0 −5 −4 −3 −2 −1 0 1
PAGE 18
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 TYPICAL CHARACTERISTICS† HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT 5 16 VOH VOH − High-Level Output Voltage − V VOH VOH − High-Level Output Voltage − V VID = 100 mV TA = 25°C 4 VDD = 5 V 3 VDD = 4 V ÁÁ ÁÁ ÁÁ VDD = 3 V 2 0 0 VDD = 16 V 12 −2 −4 −6 −8 IOH − High-Level Output Current − mA 8 VDD = 10 V 6 4
PAGE 19
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 TYPICAL CHARACTERISTICS† LOW-LEVEL OUTPUT VOLTAGE vs DIFFERENTIAL INPUT VOLTAGE LOW-LEVEL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE 700 500 VOL VOL − Low-Level Output Voltage − mV VOL VOL − Low-Level Output Voltage − mV VDD = 5 V IOL = 5 mA TA = 25°C 600 VID = − 100 mV 500 ÁÁ ÁÁ ÁÁ ÁÁ 400 VID = − 1 V 300 0 0.5 1 1.5 2 2.5 3 3.
PAGE 20
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 TYPICAL CHARACTERISTICS† LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT VOL VOL − Low-Level Output Voltage − V 0.9 0.8 ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ VDD = 5 V 0.7 VDD = 4 V 0.6 VDD = 3 V 0.5 ÁÁ ÁÁ ÁÁ 0.4 0.2 0.1 0 1 2 3 4 5 6 7 IOL − Low-Level Output Current − mA VID = − 1 V VIC = 0.5 V TA = 25°C 2.5 2 1.5 1 0.
PAGE 21
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 TYPICAL CHARACTERISTICS† COMMON-MODE INPUT VOLTAGE POSITIVE LIMIT vs SUPPLY VOLTAGE ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ 10000 16 VDD = 10 V VIC = 5 V See Note A 1000 100 ÎÎ VI − Common-Mode Input Voltage − V VIC IIIB I IO − Input Bias and Offset Currents − pA IB and IIO INPUT BIAS CURRENT AND INPUT OFFSET CURRENT vs FREE-AIR TEMPERATURE IIB ÎÎ IIO 10 1 0.
PAGE 22
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 TYPICAL CHARACTERISTICS† SLEW RATE vs SUPPLY VOLTAGE SLEW RATE vs FREE-AIR TEMPERATURE 0.07 0.07 AV = 1 VI(PP) = 1 V RL =1 MΩ CL = 20 pF TA = 25°C See Figure 1 0.05 0.06 SR − Slew Rate − V/sµ s SR − Slew Rate − V/sµ s 0.06 0.04 0.03 0.03 0.01 0.01 2 4 6 8 10 12 VDD − Supply Voltage − V 14 0.00 −75 16 VDD = 10 V VI(PP) = 1 V 0.04 0.02 0.
PAGE 23
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 TYPICAL CHARACTERISTICS† UNITY-GAIN BANDWIDTH vs FREE-AIR TEMPERATURE UNITY-GAIN BANDWIDTH vs SUPPLY VOLTAGE 150 140 VDD = 5 V VI = 10 mV CL = 20 pF See Figure 3 B1 B1 − Unity-Gain Bandwidth − kHz B1 B1 − Unity-Gain Bandwidth − kHz 130 VI = 10 mV CL = 20 pF TA = 25°C See Figure 3 130 110 90 70 50 120 110 100 90 80 70 60 30 −75 50 −50 −25 0 25 50 75 100 TA − Free-Ai
PAGE 24
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 TYPICAL CHARACTERISTICS† LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE SHIFT vs FREQUENCY 10 7 VDD = 10 V RL = 1 MΩ TA = 25°C ÁÁ ÁÁ ÁÁ 10 5 0° 10 4 30° AVD 10 3 60° ÎÎÎÎÎ ÎÎÎÎÎ 10 2 90° Phase Shift AVD AVD − Large-Signal Differential Voltage Amplification 10 6 Phase Shift 10 1 120° 1 150° 0.
PAGE 25
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 TYPICAL CHARACTERISTICS PHASE MARGIN vs CAPACITIVE LOAD 37° ÁÁ ÁÁ ÁÁ ÁÁ 33° 31° ÁÁ ÁÁ 29° 27° 25° 0 10 20 30 40 50 60 70 80 CL − Capacitive Load − pF 90 100 VN nV/HzHz V n− Equivalent Input Noise Voltage − nV/ 200 VDD = 5 mV VI = 10 mV TA = 25°C See Figure 3 35° φm m − Phase Margin EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY VDD = 5 V RS = 20 Ω TA = 25°C See Figur
PAGE 26
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 APPLICATION INFORMATION single-supply operation While the TLC27L2 and TLC27L7 perform well using dual power supplies (also called balanced or split supplies), the design is optimized for single-supply operation. This design includes an input common-mode voltage range that encompasses ground as well as an output voltage range that pulls down to ground.
PAGE 27
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 APPLICATION INFORMATION input characteristics The TLC27L2 and TLC27L7 are specified with a minimum and a maximum input voltage that, if exceeded at either input, could cause the device to malfunction. Exceeding this specified range is a common problem, especially in single-supply operation.
PAGE 28
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 APPLICATION INFORMATION output characteristics (continued) (a) CL = 20 pF, RL = NO LOAD (b) CL = 260 pF, RL = NO LOAD 2.5 V − VO + VI TA = 25°C f = 1 kHz VI(PP) = 1 V CL −2.5 V (d) TEST CIRCUIT (c) CL = 310 pF, RL = NO LOAD Figure 41.
PAGE 29
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 APPLICATION INFORMATION output characteristics (continued) VDD VI + RP IP C VO − IF R2 RL − IL R1 VO + V –V DD O ) I ) I F L P ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ R P + I IP = Pullup current required by the operational amplifier (typically 500 µA) Figure 42. Resistive Pullup to Increase VOH Figure 43.
PAGE 30
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 APPLICATION INFORMATION 1/2 TLC27L2 + VO1 500 kΩ − 5V 500 kΩ + VO2 − 1/2 TLC27L2 0.1 µF 500 kΩ 500 kΩ Figure 44. Multivibrator 100 kΩ VDD 100 kΩ Set + − Reset 100 kΩ 1/2 TLC27L2 33 kΩ NOTE: VDD = 5 V to 16 V Figure 45.
PAGE 31
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 APPLICATION INFORMATION VDD VI 1/2 TLC27L7 + VO − 90 kΩ VDD C S1 SELECT: AV S1 10 X1 TLC4066 A S2 100 B 1 9 kΩ C S2 1 X2 A Analog Switch 2 B 2 1 kΩ NOTE: VDD = 5 V to 12 V Figure 46. Amplifier With Digital Gain Selection 10 kΩ VDD 20 kΩ − VI VO 1/2 TLC27L2 100 kΩ + NOTE: VDD = 5 V to 16 V Figure 47.
PAGE 32
 SLOS052D − OCTOBER 1987 − REVISED OCTOBER 2005 APPLICATION INFORMATION 0.016 µF 5V VI 10 kΩ 10 kΩ + VO 0.016 µF − 1/2 TLC27L2 NOTE: Normalized to fc = 1 kHz and RL = 10 kΩ Figure 48. Two-Pole Low-Pass Butterworth Filter R2 100 kΩ VDD R1 10 kΩ VIA − R1 10 kΩ VIB VO + 1/2 TLC27L7 R2 100 kΩ NOTE: VDD = 5 V to 16 V V + R2 V – V IA O R1 IB ǒ Ǔ Figure 49.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 26-Aug-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) TLC27L7MJG OBSOLETE CDIP JG 8 TBD Call TI Call TI -55 to 125 TLC27L7MJGB OBSOLETE CDIP JG 8 TBD Call TI Call TI -55 to 125 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 12-Aug-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TLC27L2ACDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLC27L2AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLC27L2BCDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLC27L2BIDR SOIC D 8 2500 330.
PAGE 40
PACKAGE MATERIALS INFORMATION www.ti.com 12-Aug-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TLC27L2ACDR SOIC D 8 2500 340.5 338.1 20.6 TLC27L2AIDR SOIC D 8 2500 340.5 338.1 20.6 TLC27L2BCDR SOIC D 8 2500 340.5 338.1 20.6 TLC27L2BIDR SOIC D 8 2500 340.5 338.1 20.6 TLC27L2CDR SOIC D 8 2500 340.5 338.1 20.6 TLC27L2CPSR SO PS 8 2000 367.0 367.0 38.
PAGE 41
MECHANICAL DATA MCER001A – JANUARY 1995 – REVISED JANUARY 1997 JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE 0.400 (10,16) 0.355 (9,00) 8 5 0.280 (7,11) 0.245 (6,22) 1 0.063 (1,60) 0.015 (0,38) 4 0.065 (1,65) 0.045 (1,14) 0.310 (7,87) 0.290 (7,37) 0.020 (0,51) MIN 0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN 0.023 (0,58) 0.015 (0,38) 0°–15° 0.100 (2,54) 0.014 (0,36) 0.008 (0,20) 4040107/C 08/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters).
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.