Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsData collecting ICsData acquisition IC - DA converter (DAC) SOIC 24

TLC7225C, TLC7225I

QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTERS

SLAS109B – OCTOBER 1996 – REVISED FEBRUARY 2001

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Four 8-Bit D/A Converters With Individual

References

Direct Bipolar Operation Without an

External Level-Shift Amplifier

Microprocessor Compatible

TTL/CMOS Compatible

Single Supply Operation Possible

Simultaneous Update Facility

Binary Input Coding

applications

Process Control

Automatic Test Equipment

Automatic Calibration of Large System

Parameters e.g., Gain/Offset

description

The TLC7225 consists of four 8-bit voltage-output digital-to-analog converters (DACs), with output buffer

amplifiers and interface logic with double register-buffering.

Separate on-chip latches are provided for each of the DACs. Data is transferred into one of these data latches

through a common 8-bit TTL/CMOS-compatible (5 V) input port. Control inputs A0 and A1 determine which DAC

is loaded when WR

goes low. Only the data held in the DAC registers determines the analog outputs of the

converters. The double register buffering allows simultaneous update of all four outputs under control of LDAC

All logic inputs are TTL- and CMOS-level compatible and the control logic is speed compatible with most 8-bit

microprocessors. Each DAC includes an output buffer amplifier capable of driving up to 5 mA of output current.

The TLC7225 performance is specified for input reference voltages from 2 V to V

– 4 V with dual supplies.

The voltage-mode configuration of the DACs allow the TLC7225 to be operated from a single power-supply rail

at a reference of 10 V.

The TLC7225 is fabricated in a LinBiCMOS process that has been specifically developed to allow high-speed

digital logic circuits and precision analog circuits to be integrated on the same chip. The TLC7225 has a common

8-bit data bus with individual DAC latches. This provides a versatile control architecture for simple interface to

microprocessors. All latch-enable signals are level triggered.

Combining four DACs, four operational amplifiers, and interface logic into a small, 0.3-inch wide, 24-terminal

SOIC allows significant reduction in board space requirements and offers increased reliability in systems using

multiple converters. The pinout optimizes board layout with all of the analog inputs and outputs at one end of

the package and all of the digital inputs at the other.

The TLC7225C is characterized for operation from 0°C to 70°C. The TLC7225I is characterized for operation

from –25°C to 85°C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

OUTB

OUTA

REFB

REFA

AGND

DGND

LDAC

(MSB) DB7

DB6

DB5

DB4

OUTC

OUTD

REFC

REFD

DB0 (LSB)

DB1

DB2

DB3

DW PACKAGE

(TOP VIEW)

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

LinBiCMOS is a trademark of Texas Instruments.

Summary of content (23 pages)

PAGE 1
TLC7225C, TLC7225I QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTERS SLAS109B – OCTOBER 1996 – REVISED FEBRUARY 2001 D D D D D D D Four 8-Bit D/A Converters With Individual References Direct Bipolar Operation Without an External Level-Shift Amplifier Microprocessor Compatible TTL/CMOS Compatible Single Supply Operation Possible Simultaneous Update Facility Binary Input Coding applications D D D Process Control Automatic Test Equipment Automatic Calibration of Large System Parameters e.g.
PAGE 2
TLC7225C, TLC7225I QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTERS SLAS109B – OCTOBER 1996 – REVISED FEBRUARY 2001 AVAILABLE OPTIONS PACKAGED DEVICES TA SMALL OUTLINE (DW) 0°C to 70°C TLC7225CDW – 25°C to 85°C TLC7225IDW functional block diagram REFA 5 _ Input Latch A DAC Latch A DAC A Input Latch B DAC Latch B DAC B 8 Input Latch C DAC Latch C DAC C 8 Input Latch D DAC Latch D DAC D 8 REFB 4 2 _ 8 9–16 DB0 – DB7 21 REFC 8 OUTA + 1 + OUTB _ REFD LDAC 20 24 _ + 8 17 WR 19
PAGE 3
TLC7225C, TLC7225I QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTERS SLAS109B – OCTOBER 1996 – REVISED FEBRUARY 2001 Terminal Functions TERMINAL NAME NO. AGND 6 A0, A1 18, 19 DGND 7 DB0 – DB7 9 – 16 I/O DESCRIPTION Analog ground I DAC select inputs Digital ground I Digital DAC data inputs LDAC 8 Load DAC. A high level simultaneously loads all four DAC registers. DAC registers are transparent when LDAC is low.
PAGE 4
TLC7225C, TLC7225I QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTERS SLAS109B – OCTOBER 1996 – REVISED FEBRUARY 2001 recommended operating conditions MIN MAX UNIT Supply voltage, VDD 11.4 16.5 V Supply voltage, VSS – 5.5 0 V High-level input voltage, VIH 2 V Low-level input voltage, VIL 0.
PAGE 5
TLC7225C, TLC7225I QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTERS SLAS109B – OCTOBER 1996 – REVISED FEBRUARY 2001 electrical characteristics over recommended operating free-air temperature range reference inputs (all supply ranges) PARAMETER ri Ci TEST CONDITIONS Input resistance, REFA, REFB, REFC, REFD Input In ut ca capacitance acitance, REFA, REFA REFB, REFB REFC, REFC REFD AC feedthrough TYP 1.
PAGE 6
TLC7225C, TLC7225I QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTERS SLAS109B – OCTOBER 1996 – REVISED FEBRUARY 2001 operating characteristics over recommended operating free-air temperature range dual power supply over recommended supply and reference voltage ranges, AGND = DGND = 0 V (unless otherwise noted) PARAMETER TEST CONDITIONS Slew rate ts MIN Positive full scale MAX Settling time to 1/2 LSB Negative full scale UNIT V/µs 5 Vref(A, f(A B, B C, C D) = 10 V 7 Resolution 8 µs Bits VDD = 15 V
PAGE 7
TLC7225C, TLC7225I QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTERS SLAS109B – OCTOBER 1996 – REVISED FEBRUARY 2001 PARAMETER MEASUREMENT INFORMATION VDD Address 0V th(AW) tsu(AW) tw1 VDD WR 0V tw2 VDD LDAC 0V th(DW) tsu(DW) VDD Data Valid Data In 0V NOTES: A. tr = tf = 20 ns over VDD range. B. The timing-measurement reference level is equal to VIH + VIL divided by 2. C. If LDAC is activated prior to the rising edge of WR, then it must remain low for at least tw2 after WR goes high. Figure 1.
PAGE 8
TLC7225C, TLC7225I QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTERS SLAS109B – OCTOBER 1996 – REVISED FEBRUARY 2001 APPLICATION INFORMATION specification ranges For the TLC7225 to operate to rated specifications, the input reference voltage must be at least 4 V below the power supply voltage at the VDD terminal. This voltage differential is the overhead voltage required by the output amplifiers. The TLC7225 is specified to operate over a VDD range from 12 V ± 5% to 15 V ± 10% (i.e., from 11.4 V to 16.
PAGE 9
TLC7225C, TLC7225I QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTERS SLAS109B – OCTOBER 1996 – REVISED FEBRUARY 2001 APPLICATION INFORMATION output buffer Each voltage-mode DAC output is buffered by a unity-gain noninverting amplifier. This buffer amplifier is capable of developing 10 V across a 2-kΩ load and can drive capacitive loads of 3300 pF.
PAGE 10
TLC7225C, TLC7225I QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTERS SLAS109B – OCTOBER 1996 – REVISED FEBRUARY 2001 APPLICATION INFORMATION Table 2. TLC7225 Truth Table CONTROL INPUTS FUNCTION WR LDAC H H No operation. Device not selected L H Input register of selected DAC is transparent. ↑ H Input register of selected DAC is latched. H L All four DAC registers are transparent (i.e., outputs respond to data held in respective input registers) input registers are latched.
PAGE 11
TLC7225C, TLC7225I QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTERS SLAS109B – OCTOBER 1996 – REVISED FEBRUARY 2001 APPLICATION INFORMATION ground management and layout The TLC7225 contains four reference inputs that can be driven from ac sources (see multiplying DAC using ac input to the REF terminals section) so careful layout and grounding is important to minimize analog crosstalk between the four channels. The dynamic performance of the four DACs depends upon the optimum choice of board layout.
PAGE 12
TLC7225C, TLC7225I QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTERS SLAS109B – OCTOBER 1996 – REVISED FEBRUARY 2001 APPLICATION INFORMATION unipolar output operation The unipolar output operation is the basic mode of operation for each channel of the TLC7225, with the output voltages having the same positive polarity as Vref. The TLC7225 can be operated with a single supply (VSS = AGND) or with positive or negative supplies.
PAGE 13
TLC7225C, TLC7225I QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTERS SLAS109B – OCTOBER 1996 – REVISED FEBRUARY 2001 APPLICATION INFORMATION AGND bias for direct bipolar-output operation The TLC7225 can be used in bipolar operation without adding additional external operational amplifiers by biasing AGND to VSS as shown in Figure 9. This configuration provides an excellent method for providing a direct bipolar output with no additional components. The transfer values are shown in Table 4.
PAGE 14
TLC7225C, TLC7225I QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTERS SLAS109B – OCTOBER 1996 – REVISED FEBRUARY 2001 APPLICATION INFORMATION AGND bias for positive output offset The TLC7225 AGND terminal can be biased above or below the system ground terminal, DGND, to provide an offset-zero analog-output voltage level. Figure 10 shows a circuit configuration to achieve this for channel A of the TLC7225.
PAGE 15
TLC7225C, TLC7225I QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTERS SLAS109B – OCTOBER 1996 – REVISED FEBRUARY 2001 APPLICATION INFORMATION bipolar-output operation using external amplifier Each of the DACs of the TLC7225 can also be individually configured to provide bipolar output operation using an external amplifier and two resistors per channel. Figure 11 shows a circuit used to implement offset binary coding (bipolar operation) with DAC A of the TLC7225.
PAGE 16
TLC7225C, TLC7225I QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTERS SLAS109B – OCTOBER 1996 – REVISED FEBRUARY 2001 APPLICATION INFORMATION digital word multiplication Since each DAC of the TLC7225 has a separate reference input, the output of one DAC can be used as the reference input for another. Therefore, multiplication of digital words can be performed (with the result given in analog form).
PAGE 17
TLC7225C, TLC7225I QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTERS SLAS109B – OCTOBER 1996 – REVISED FEBRUARY 2001 APPLICATION INFORMATION microprocessor interface Figures 14, 15, 16, and 17 show the hardware interface to some of the standard processors. A15 Address Bus A8 A0 A1 8085/8088 Address Decode LDAC TLC7225† WR WR DB7 Latch ALE EN DB0 AD7 Address Data Bus AD0 † Linear circuitry omitted for clarity Figure 14.
PAGE 18
TLC7225C, TLC7225I QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTERS SLAS109B – OCTOBER 1996 – REVISED FEBRUARY 2001 APPLICATION INFORMATION A15 Address Bus A8 A0 Z-80 A1 MREQ Address Decode EN LDAC TLC7225† WR WR DB7 DB0 AD7 Data Bus AD0 † Linear circuitry omitted for clarity Figure 16. TLC7225 to Z-80 Interface, Double-Buffered Mode A23 Address Bus A1 A0 68008 AS Address Decode EN A1 TLC7225† WR R/W LDAC DTACK DB7 DB0 AD7 Data Bus AD0 † Linear circuitry omitted for clarity Figure 17.
PAGE 19
TLC7225C, TLC7225I QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTERS SLAS109B – OCTOBER 1996 – REVISED FEBRUARY 2001 APPLICATION INFORMATION linearity, offset, and gain error using single-ended supplies When an amplifier is operated from a single supply, the voltage offset can still be either positive or negative. With a positive offset, the output voltage changes on the first code change.
PAGE 20
PACKAGE OPTION ADDENDUM www.ti.
PAGE 21
PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.
PAGE 22
PAGE 23
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.