Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsInterface ICsInterface IC - transceivers IEEE 1149.1 1/1 HVQFP 64

17 18 19

JTDI

SYNC/PASS

GND

RD0

RD1

RD2

VDD

RD3

RD4

RD5

RD6

VDD

RD7

RD8

RD9

GND

TD0

TD1

TD2

VDD

TD3

TD4

TD5

TD6

VDD

TD7

TD8

TD9

GND

MODESEL

PRBSEN

21 22 23 24

VDD

RXP

63 62 61 60 5964 58

TXP

TXN

VDDA

GNDA

VDDA

JTRSTN

LOS

JTDO

ENABLE

VDD

LOOPEN

VDD

GND

REFCLK

VDD

SYNCEN

GND

56 55 5457

25 26 27 28 29

53 52

TESTEN

VDDA

RXN

51 50 49

30 31 32

RBC1

RBC0

RBCMODE

GNDA

JTMS

TCK

GNDPLL

VDD

VDDPLL

TLK1211RCP

www.ti.com

SLLS658D – SEPTEMBER 2006– REVISED APRIL 2011

ETHERNET TRANSCEIVERS

Check for Samples: TLK1211RCP

FEATURES

• Advanced 0.25-μm CMOS Technology

• No External Filter Capacitors Required

• 0.6-Gbps to 1.3-Gbps Serializer/Deserializer

• Comprehensive Suite of Built-In Testability

• Low Power Consumption <250 mW (typ) at

1.25 Gbps

• IEEE 1149.1 JTAG Support

• Fast Relock Times Less Than 256 ns (Typ)

• 2.5-V Supply Voltage for Lowest Power

Suitable for EPON/GEPON Applications

Operation

• LVPECL Compatible Differential I/O on High

• 3.3-V Tolerant on LVTTL Inputs

Speed Interface

• Hot Plug Protection

• Single Monolithic PLL Design

• 64-Pin VQFP With Thermally Enhanced

• Support For 10-Bit Interface or Reduced

Package ( PowerPAD™)

Interface 5-Bit DDR (Double Data Rate)

• CPRI Data Rate Compatible (614 Mbps,

Clocking

1.22 Gbps)

• Receiver Differential Input Thresholds 200 mV

• Industrial Temperature Range

Minimum

Supported: –40°C to 85°C

• IEEE 802.3 Gigabit Ethernet Compliant

• ANSI X3.230-1994 (FC-PH) Fibre Channel

Compliant

DESCRIPTION

The TLK1211RCP gigabit ethernet transceiver provides for ultrahigh-speed, full-duplex, point-to-point data

transmissions. This device is based on the timing requirements of the 10-bit interface specification by the IEEE

802.3 gigabit ethernet specification and is also compliant with the ANSI X3.230-1994 (FC-PH) fibre channel

standard. The device supports data rates from 0.6 Gbps to 1.3 Gbps.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2PowerPAD is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (21 pages)

PAGE 1
TLK1211RCP SLLS658D – SEPTEMBER 2006 – REVISED APRIL 2011 www.ti.com ETHERNET TRANSCEIVERS Check for Samples: TLK1211RCP • • 2 • • • • • • • • • • Advanced 0.25-μm CMOS Technology No External Filter Capacitors Required Comprehensive Suite of Built-In Testability IEEE 1149.1 JTAG Support 2.5-V Supply Voltage for Lowest Power Operation 3.3-V Tolerant on LVTTL Inputs Hot Plug Protection 64-Pin VQFP With Thermally Enhanced Package ( PowerPAD™) CPRI Data Rate Compatible (614 Mbps, 1.
PAGE 2
TLK1211RCP SLLS658D – SEPTEMBER 2006 – REVISED APRIL 2011 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
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TLK1211RCP SLLS658D – SEPTEMBER 2006 – REVISED APRIL 2011 www.ti.com Table 1. AVAILABLE OPTIONS (1) PACKAGE TA PLASTIC QUAD FLAT PACK (RCP) –40°C to 85°C (1) TLK1211RCP For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com.
PAGE 4
TLK1211RCP SLLS658D – SEPTEMBER 2006 – REVISED APRIL 2011 www.ti.com Terminal Functions (continued) TERMINAL NAME NO. I/O DESCRIPTION RBCMODE 32 I P/D (1) Receive clock mode select. When RBCMODE and MODESEL are low, half-rate clocks are output on RBC0 and RBC1. When MODESEL is low and RBCMODE is high, a full baud-rate clock is output on RBC0 and RBC1 is held low. When MODESEL is high, RBCMODE is ignored and a full baud-rate clock is output on RBC0 and RBC1 is held low.
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TLK1211RCP SLLS658D – SEPTEMBER 2006 – REVISED APRIL 2011 www.ti.com Terminal Functions (continued) TERMINAL NAME I/O NO. DESCRIPTION LOOPEN 19 I P/D (3) Loop enable. When LOOPEN is high (active), the internal loop-back path is activated. The transmitted serial data is directly routed to the inputs of the receiver. This provides a self-test capability in conjunction with the protocol device. The TXP and TXN outputs are held in a high-impedance state during the loop-back test.
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TLK1211RCP SLLS658D – SEPTEMBER 2006 – REVISED APRIL 2011 www.ti.com Measured 10-Bits TXP, TXN Next 10-Bit Code b7 b8 b9 b0 b1 b2 b3 td(Tx latency) 10-Bit Code TD(0−9) REFCLK Figure 1. Transmitter Latency Full Rate Mode Data Reception The receiver portion deserializes the differential serial data. The serial data is retimed based on an interpolated clock generated from the reference clock.
PAGE 7
TLK1211RCP SLLS658D – SEPTEMBER 2006 – REVISED APRIL 2011 www.ti.com RBC0 td(S) td(H) SYNC RD(0-9) K28.5 DXX.X DXX.X DXX.X K28.5 DXX.X Figure 3. Synchronous Timing Characteristics Waveforms (TBI Full-Rate Mode) In the double data rate mode, the receiver presents the data on both the rising and falling edges of RBC0. RBC1 is low impedance. The data is clocked bit 0 first, and aligned to the rising edge of RBC0. See the timing diagram shown in Figure 4.
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TLK1211RCP SLLS658D – SEPTEMBER 2006 – REVISED APRIL 2011 31 Bit Times Max Receive Path Latency INPUT DATA K28.5 DXX.X www.ti.com 30 Bit Times (Max) K28.5 DXX.X DXX.X DXX.X DXX.X K28.5 RBC0 RBC1 Worst Case Misaligned K28.5 RD(0-9) DXX.X DXX.X Corrupt Data K28.5 DXX.X DXX.X Misalignment Corrected K28.5 DXX.X DXX.X DXX.X K28.5 SYNC Figure 5. Word Realignment Timing Characteristics Waveforms Systems that do not require framed data may disable byte alignment by tying SYNCEN low.
PAGE 9
TLK1211RCP SLLS658D – SEPTEMBER 2006 – REVISED APRIL 2011 www.ti.com Testability The loopback function provides for at-speed testing of the transmit/receive portions of the circuitry. The enable function allows for all circuitry to be disabled so that an Iddq test can be performed. The PRBS function also allows for a BIST (built-in self test). The terminal setting, TESTEN high, enables the test mode. The terminal TESTEN has an internal pulldown resistor, so it defaults to normal operation.
PAGE 10
TLK1211RCP SLLS658D – SEPTEMBER 2006 – REVISED APRIL 2011 www.ti.com ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) TLK1211RCP Supply voltage, VDD (see (2) –0.3 V to 3 V ) –0.5 V to 4 V Input voltage range at TTL terminals, VI –0.3 V to VDD +0.
PAGE 11
TLK1211RCP SLLS658D – SEPTEMBER 2006 – REVISED APRIL 2011 www.ti.com RECOMMENDED OPERATING CONDITIONS Supply voltage, VDD, VDD(A) MIN NOM MAX 2.3 2.5 2.7 UNIT V Total supply current, IDD, IDD(A) Frequency = 1.25 Gbps, PRBS pattern 95 113 mA Total power dissipation, PD Frequency = 1.25 Gbps, PRBS pattern 238 305 mW Total shutdown current, IDD, IDD(A) Enable = 0, VDD(A), VDD = 2.7 V 1 mA Startup lock time, PLL VDD, VDD(A) = 2.
PAGE 12
TLK1211RCP SLLS658D – SEPTEMBER 2006 – REVISED APRIL 2011 www.ti.
PAGE 13
TLK1211RCP SLLS658D – SEPTEMBER 2006 – REVISED APRIL 2011 www.ti.com CL 5 pF 50 Ω 50 Ω CL 5 pF Figure 8. Transmitter Test Setup LVTTL OUTPUT SWITCHING CHARACTERISTICS over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX Clock rise time tf(RBC) Clock fall time tr Data rise time tf Data fall time tsu(D1) Data setup time (RD0–RD9), Data valid prior to RBC0 rising TBI normal mode, (see Figure 3) 2.
PAGE 14
TLK1211RCP SLLS658D – SEPTEMBER 2006 – REVISED APRIL 2011 www.ti.com APPLICATION INFORMATION 8B/10B TRANSMISSION CODE The PCS maps GMII signals into 10-bit code groups and vice versa, using an 8b/10b block coding scheme. The PCS uses the transmission code to improve the transmission characteristics of information to be transferred across the link.
PAGE 15
TLK1211RCP SLLS658D – SEPTEMBER 2006 – REVISED APRIL 2011 www.ti.com 5 Ω at 100 MHz 2.5 V 2.5 V 18 VDD VDDA 0.
PAGE 16
TLK1211RCP SLLS658D – SEPTEMBER 2006 – REVISED APRIL 2011 www.ti.com Other requirements for thermal lands and thermal vias are detailed in the TI application note PowerPAD Thermally Enhanced Package Application Report, TI literature number SLMA002, available via the TI Web pages beginning at URL: http://www.ti.com. Figure 13. Example of a Thermal Land For the TLK1211RCP, this thermal land must be grounded to the low-impedance ground plane of the device.
PAGE 17
PACKAGE OPTION ADDENDUM www.ti.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.