Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - LDO voltage regulator Positive, fixed SOT 223 4

TLV1171xxDCY

VOUT

VIN

GND

TLV1171

www.ti.com

SBVS177 –APRIL 2012

1-A, Positive Fixed-Voltage, Low-Dropout Regulator

FEATURES

DESCRIPTION

The TLV1171 low-dropout (LDO) linear regulator is a

• Accuracy: 1.5% (typ)

low input voltage version of the popular 1117 voltage

• Low I

: 100 μA (max)

regulator.

– 500x Lower Than Standard 1117 Devices

The TLV1171 is an extremely low-power device that

• V

: 2.0 V to 5.5 V

consumes 500x lower quiescent current than the

– Absolute Maximum V

: 6.0 V

traditional 1117 voltage regulator, making the

TLV1171 suitable for applications that mandate very

• Stable with 0-mA Output Current

low standby current. The TLV1171 LDO is also stable

• Low Dropout: 455 mV at 1 A for V

OUT

= 3.3 V

with 0 mA of load current; there is no minimum load

• High PSRR: 65 dB at 1 kHz

requirement, making the device an ideal choice for

applications where the regulator is required to power

• Minimum Ensured Current Limit: 1.1 A

very small loads during standby in addition to large

• Stable with Cost-Effective Ceramic Capacitors:

currents on the order of 1 A during normal operation.

– With 0-Ω ESR

The TLV1171 offers excellent line and load transient

performance, resulting in very small magnitude output

• Temperature Range: –40°C to +125°C

voltage undershoots and overshoots when the load

• Thermal Shutdown and Overcurrent Protection

current requirement changes from less than 1 mA to

• Available Package: SOT223

more than 500 mA.

– See the Package Option Addendum at the

A precision band gap and error amplifier provides

end of this document for a complete list of

1.5% accuracy. A very high power-supply rejection

available voltage options.

ratio enables the device to be used for post-

regulation after a switching regulator. Other valuable

APPLICATIONS

features include low output noise and low-dropout

voltage.

• Set Top Boxes

The device is internally compensated to be stable

• TVs and Monitors

with 0-Ω equivalent series resistance (ESR)

• PC Peripherals, Notebooks, and Motherboards

capacitors. These key advantages enable the use of

• Modems and Other Communication Products

cost-effective, small-size ceramic capacitors. Cost-

effective capacitors that have higher bias voltages

• Switching Power-Supply Post-Regulation

and temperature derating can also be used if desired.

The TLV1171 is available in a SOT223 package. For

alternate pin outs of the device, refer to the

TLV1117LV.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (18 pages)

PAGE 1
TLV1171 www.ti.com SBVS177 – APRIL 2012 1-A, Positive Fixed-Voltage, Low-Dropout Regulator FEATURES DESCRIPTION • • The TLV1171 low-dropout (LDO) linear regulator is a low input voltage version of the popular 1117 voltage regulator. 1 2 • • • • • • • • • Accuracy: 1.5% (typ) Low IQ: 100 μA (max) – 500x Lower Than Standard 1117 Devices VIN: 2.0 V to 5.5 V – Absolute Maximum VIN: 6.0 V Stable with 0-mA Output Current Low Dropout: 455 mV at 1 A for VOUT = 3.
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TLV1171 SBVS177 – APRIL 2012 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
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TLV1171 www.ti.com SBVS177 – APRIL 2012 ELECTRICAL CHARACTERISTICS At TA = +25°C, VIN = VOUT(TYP) + 1.5 V, IOUT = 10 mA, and COUT = 1.0 μF, unless otherwise noted. TLV1171 PARAMETER VIN TEST CONDITIONS MIN Input voltage range VOUT > 2 V VOUT DC output accuracy 1.5 V ≤ VOUT < 2 V 1.2 V ≤ VOUT < 1.5 V TYP MAX UNIT 2.0 5.5 V –1.5 +1.5 % –2 +2 % –40 +40 mV ΔVO/ΔVIN Line regulation VOUT(NOM) + 0.5 V ≤ VIN ≤ 5.
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TLV1171 SBVS177 – APRIL 2012 www.ti.com PIN CONFIGURATION GND DCY PACKAGE SOT223 (TOP VIEW) 3 VOUT 2 GND 1 VIN PIN DESCRIPTIONS NAME PIN GND 2, Tab DESCRIPTION IN 1 Input pin. See the Input and Output Capacitor Requirements section for more details. OUT 3 Regulated output voltage pin. See the Input and Output Capacitor Requirements section for more details. Ground pin FUNCTIONAL BLOCK DIAGRAM IN OUT Current Limit Thermal Shutdown UVLO Bandgap LOGIC TLV1171 Series GND Figure 1.
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TLV1171 www.ti.com SBVS177 – APRIL 2012 TYPICAL CHARACTERISTICS At TA = +25°C, VIN = VOUT(TYP) + 1.5 V; IOUT = 10 mA, and COUT = 1.0 μF, unless otherwise noted. LINE REGULATION LINE REGULATION 1.9 1.9 1.85 1.8 +125°C +85°C +25°C -40°C 1.75 VOUT = 1.8 V IOUT = 1 A Output Voltage (V) Output Voltage (V) VOUT = 1.8 V IOUT = 10 mA 1.85 1.8 1.75 1.7 +85°C +25°C -40°C 1.7 2.3 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 3.3 3.5 3.7 3.9 Input Voltage (V) 4.1 4.3 4.5 4.7 4.9 5.1 5.3 Figure 2.
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TLV1171 SBVS177 – APRIL 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VIN = VOUT(TYP) + 1.5 V; IOUT = 10 mA, and COUT = 1.0 μF, unless otherwise noted. QUIESCENT CURRENT vs OUTPUT CURRENT CURRENT LIMIT vs INPUT VOLTAGE 1.8 600 1.78 1.76 400 300 200 +125°C +85°C +25°C -40°C 100 Current Limit (mA) Quiescent Current (mA) 500 1.74 1.72 1.7 1.68 1.66 1.64 +85°C +25°C -40°C 1.62 1.6 0 0 3.3 3.5 100 200 300 400 500 600 700 800 900 1000 3.7 3.9 4.1 4.3 Figure 8.
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TLV1171 www.ti.com SBVS177 – APRIL 2012 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VIN = VOUT(TYP) + 1.5 V; IOUT = 10 mA, and COUT = 1.0 μF, unless otherwise noted. 500 mA LOAD TRANSIENT RESPONSE (200 mA to 500 mA, COUT = 10 μF) VIN = 2.8 V IOUT 200 mA 200 mA/div 200 mA/div LOAD TRANSIENT RESPONSE (200 mA to 500 mA, COUT = 1 μF) 500 mA VIN = 2.8 V IOUT 200 mA 50 mV/div VOUT 50 ms/div Figure 15.
PAGE 8
TLV1171 SBVS177 – APRIL 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VIN = VOUT(TYP) + 1.5 V; IOUT = 10 mA, and COUT = 1.0 μF, unless otherwise noted. LOAD TRANSIENT RESPONSE (1 mA to 1 A, COUT = 1 μF) IOUT 100 mV/div 1 mA VOUT 1A 500 mA/div 1A IOUT 1 mA VOUT 50 ms/div Figure 21. LINE TRANSIENT RESPONSE (VOUT = 1.8 V, IOUT = 10 mA) LINE TRANSIENT RESPONSE (VOUT = 1.8 V, IOUT = 500 mA) 4.3 V 3.3 V 5 mV/div VIN 1 V/div 50 ms/div Figure 20. VOUT 4.3 V 3.
PAGE 9
TLV1171 www.ti.com SBVS177 – APRIL 2012 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VIN = VOUT(TYP) + 1.5 V; IOUT = 10 mA, and COUT = 1.0 μF, unless otherwise noted. 5.5 V 3.3 V VIN 1 V/div LINE TRANSIENT RESPONSE (VOUT = 1.8 V, IOUT = 1 A) 10 mV/div 10 mV/div 1 V/div LINE TRANSIENT RESPONSE (VOUT = 1.8 V, IOUT = 500 mA) VOUT 5.5 V 3.3 V VIN VOUT 200 ms/div 200 ms/div Figure 26. Figure 27.
PAGE 10
TLV1171 SBVS177 – APRIL 2012 www.ti.com APPLICATION INFORMATION The TLV1171 is a low quiescent current linear regulator designed for high-current applications. Unlike typical high-current linear regulators, the TLV1171 consumes significantly less quiescent current. The device delivers excellent line and load transient performance. The TLV1171 is low noise, and exhibits a very good power-supply rejection ratio (PSRR).
PAGE 11
TLV1171 www.ti.com SBVS177 – APRIL 2012 DROPOUT VOLTAGE The TLV1171 uses a PMOS pass transistor to achieve low dropout. When (VIN – VOUT) is less than the dropout voltage (VDO), the PMOS pass device is in the linear region of operation and the input-to-output resistance is the RDS(ON) of the PMOS pass element. VDO scales approximately with output current because the PMOS device behaves like a resistor in dropout.
PAGE 12
PACKAGE OPTION ADDENDUM www.ti.
PAGE 13
PACKAGE OPTION ADDENDUM www.ti.com (4) 9-Jul-2013 There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.
PAGE 14
PACKAGE MATERIALS INFORMATION www.ti.com 12-Nov-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) TLV117112DCYR SOT-223 DCY 4 2500 330.0 12.4 7.05 TLV117112DCYR SOT-223 DCY 4 2500 330.0 12.4 7.05 TLV117112DCYT SOT-223 DCY 4 250 177.8 12.4 7.05 TLV117112DCYT SOT-223 DCY 4 250 180.0 12.4 7.05 TLV117118DCYR SOT-223 DCY 4 2500 330.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 12-Nov-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TLV117112DCYR SOT-223 DCY 4 2500 358.0 335.0 35.0 TLV117112DCYR SOT-223 DCY 4 2500 340.0 340.0 38.0 TLV117112DCYT SOT-223 DCY 4 250 358.0 335.0 35.0 TLV117112DCYT SOT-223 DCY 4 250 340.0 340.0 38.0 TLV117118DCYR SOT-223 DCY 4 2500 358.0 335.0 35.0 TLV117118DCYR SOT-223 DCY 4 2500 340.0 340.
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MECHANICAL DATA MPDS094A – APRIL 2001 – REVISED JUNE 2002 DCY (R-PDSO-G4) PLASTIC SMALL-OUTLINE 6,70 (0.264) 6,30 (0.248) 3,10 (0.122) 2,90 (0.114) 4 0,10 (0.004) M 3,70 (0.146) 3,30 (0.130) 7,30 (0.287) 6,70 (0.264) Gauge Plane 1 2 0,84 (0.033) 0,66 (0.026) 2,30 (0.091) 4,60 (0.181) 1,80 (0.071) MAX 3 0°–10° 0,10 (0.004) M 0,25 (0.010) 0,75 (0.030) MIN 1,70 (0.067) 1,50 (0.059) 0,35 (0.014) 0,23 (0.009) Seating Plane 0,08 (0.003) 0,10 (0.0040) 0,02 (0.0008) 4202506/B 06/2002 NOTES: A. B.
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