Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLinear ICsLinear IC - Op-amp Multi-purpose SOT 23 5

SLOS156E − MAY 1996 − REVISED SEPTEMBER 2006

 

  

   

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Output Swing Includes Both Supply Rails

D Low Noise . . . 21 nV/√Hz Typ at f = 1 kHz

D Low Input Bias Current ...1 pA Typ

D Very Low Power ...11 µA Per Channel Typ

D Common-Mode Input Voltage Range

Includes Negative Rail

D Wide Supply Voltage Range

2.7 V to 10 V

D Available in the SOT-23 Package

D Macromodel Included

description

The TLV2211 is a single low-voltage operational

amplifier available in the SOT-23 package. It

consumes only 11 µA (typ) of supply current and

is ideal for battery-power applications. Looking at

Figure 1, the TLV2211 has a 3-V noise level of

22 nV/√Hz

at 1kHz; 5 times lower than competitive

SOT-23 micropower solutions. The device

exhibits rail-to-rail output performance for in-

creased dynamic range in single- or split-supply

applications. The TLV2211 is fully characterized

at 3 V and 5 V and is optimized for low-voltage

applications.

The TLV2211, exhibiting high input impedance

and low noise, is excellent for small-signal

conditioning for high-impedance sources, such as

piezoelectric transducers. Because of the micro-

power dissipation levels combined with 3-V

operation, these devices work well in hand-held

monitoring and remote-sensing applications. In

addition, the rail-to-rail output feature with single

or split supplies makes this family a great choice

when interfacing with analog-to-digital converters

(ADCs).

AVAILABLE OPTIONS

max AT 25°C

PACKAGED DEVICES

SYMBOL

CHIP FORM

‡

max AT 25

SOT-23 (DBV)

†

SYMBOL

CHIP FORM

‡

(Y)

0°C to 70°C 3 mV TLV2211CDBV VACC

TLV2211Y

−40°C to 85°C 3 mV TLV2211IDBV VACI

TLV2211Y

†

The DBV package available in tape and reel only.

‡

Chip forms are tested at T

= 25°C only.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications o

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

DBV PACKAGE

(TOP VIEW)

IN−

DD−

/GND

IN+ V

DD+

OUT

− Equivalent Input Noise Voltage −

f − Frequency − Hz

EQUIVALENT INPUT NOISE VOLTAGE

†

FREQUENCY

nV/ Hz

= 3 V

= 20 Ω

= 25°C

Figure 1. Equivalent Input Noise Voltage

Versus Frequency

†

All loads are referenced to 1.5 V.

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Advanced LinCMOS is a trademark of Texas Instruments.

Summary of content (31 pages)

PAGE 1
 SLOS156E − MAY 1996 − REVISED SEPTEMBER 2006 D D D D D D D D DBV PACKAGE (TOP VIEW) Output Swing Includes Both Supply Rails Low Noise . . . 21 nV/√Hz Typ at f = 1 kHz Low Input Bias Current . . . 1 pA Typ Very Low Power . . . 11 µA Per Channel Typ Common-Mode Input Voltage Range Includes Negative Rail Wide Supply Voltage Range 2.
PAGE 2
 SLOS156E − MAY 1996 − REVISED SEPTEMBER 2006 description (continued) With a total area of 5.6mm2, the SOT-23 package only requires one-third the board space of the standard 8-pin SOIC package. This ultra-small package allows designers to place single amplifiers very close to the signal source, minimizing noise pick-up from long PCB traces.
PAGE 3
 SLOS156E − MAY 1996 − REVISED SEPTEMBER 2006 TLV2211Y chip information This chip, when properly assembled, displays characteristics similar to the TLV2211C. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. This chip may be mounted with conductive epoxy or a gold-silicon preform.
PAGE 4
 SLOS156E − MAY 1996 − REVISED SEPTEMBER 2006 equivalent schematic VDD + Q3 Q6 Q9 R7 Q12 Q14 Q16 C2 IN + R6 OUT C1 IN − R5 Q1 Q4 Q13 Q15 R2 Q2 R3 Q5 Q7 Q8 Q10 Q11 R4 R1 VDD −/ GND COMPONENT COUNT† Transistors Diodes Resistors Capacitors 23 6 11 2 † Includes both amplifiers and all ESD, bias, and trim circuitry 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D2 Q17 D1
PAGE 5
 SLOS156E − MAY 1996 − REVISED SEPTEMBER 2006 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 V Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 6
 SLOS156E − MAY 1996 − REVISED SEPTEMBER 2006 electrical characteristics at specified free-air temperature, VDD = 3 V (unless otherwise noted) PARAMETER VIO Input offset voltage αVIO Temperature coefficient of input offset voltage Input offset voltage long-term drift (see Note 4) IIO IIB VICR VOH VOL AVD TA† TEST CONDITIONS TLV2211C MIN Full range VDD ± = ± 1.
PAGE 7
 SLOS156E − MAY 1996 − REVISED SEPTEMBER 2006 operating characteristics at specified free-air temperature, VDD = 3 V (unless otherwise noted) PARAMETER SR Slew rate at unity gain Vn Equivalent input noise voltage VN(PP) Peak-to-peak equivalent input noise voltage In Equivalent input noise current TEST CONDITIONS VO = 1.1 V to 1.9 V, CL = 100 pF‡ RL = 10 kΩ‡, TLV2211C TA† MIN 25°C 0.01 0.
PAGE 8
 SLOS156E − MAY 1996 − REVISED SEPTEMBER 2006 electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER VIO Input offset voltage αVIO Temperature coefficient of input offset voltage Input offset voltage long-term drift (see Note 5) IIO Input offset current IIB Input bias current VICR VOH VOL AVD Common-mode input voltage range High-level output voltage Low-leve
PAGE 9
 SLOS156E − MAY 1996 − REVISED SEPTEMBER 2006 operating characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER SR Slew rate at unity gain Vn Equivalent input noise voltage VN(PP) Peak-to-peak equivalent input noise voltage In Equivalent input noise current TEST CONDITIONS VO = 1.5 V to 3.5 V, CL = 100 pF‡ RL = 10 kΩ‡, TLV2211C TA† MIN 25°C 0.01 0.
PAGE 10
 SLOS156E − MAY 1996 − REVISED SEPTEMBER 2006 electrical characteristics at VDD = 5 V, TA = 25°C (unless otherwise noted) PARAMETER VIO IIO Input offset voltage IIB Input bias current VICR Common-mode input voltage range VOH High-level output voltage VOL Low-level output voltage AVD Large-signal differential voltage amplification ri(d) Differential input resistance ri(c) Common-mode input resistance ci(c)
PAGE 11
 SLOS156E − MAY 1996 − REVISED SEPTEMBER 2006 TYPICAL CHARACTERISTICS Table of Graphs FIGURE VIO Input offset voltage Distribution vs Common-mode input voltage 3, 4 5, 6 αVIO IIB/IIO Input offset voltage temperature coefficient Distribution 7, 8 Input bias and input offset currents vs Free-air temperature 9 VI Input voltage vs Supply voltage vs Free-air temperature 10 11 VOH VOL High-level output voltage vs
PAGE 12
 SLOS156E − MAY 1996 − REVISED SEPTEMBER 2006 TYPICAL CHARACTERISTICS DISTRIBUTION OF TLV2211 INPUT OFFSET VOLTAGE DISTRIBUTION OF TLV2211 INPUT OFFSET VOLTAGE 30 30 376 Amplifiers From 1 Wafer Lot VDD = ± 1.5 V TA = 25°C 25 Precentage of Amplifiers − % Precentage of Amplifiers − % 25 20 15 10 5 0 376 Amplifiers From 1 Wafer Lot VDD = ± 2.5 V TA = 25°C 20 15 10 5 −1.5 −1 −0.5 0 0.
PAGE 13
 SLOS156E − MAY 1996 − REVISED SEPTEMBER 2006 TYPICAL CHARACTERISTICS DISTRIBUTION OF TLV2211 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT DISTRIBUTION OF TLV2211 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT 50 32 Amplifiers From 1 Wafer Lot VDD = ± 1.5 V P Package TA = 25°C 40 Percentage of Amplifiers − % Percentage of Amplifiers − % 50 30 20 10 0 −3 −2 −1 0 1 2 32 Amplifiers From 1 Wafer Lot VDD = ± 2.
PAGE 14
 SLOS156E − MAY 1996 − REVISED SEPTEMBER 2006 TYPICAL CHARACTERISTICS INPUT VOLTAGE†‡ vs FREE-AIR TEMPERATURE HIGH-LEVEL OUTPUT VOLTAGE†‡ vs HIGH-LEVEL OUTPUT CURRENT 5 3 VDD = 5 V VDD = 3 V VOH − High-Level Output Voltage − V VI − Input Voltage − V 4 3 | VIO | ≤ 5 mV 2 ÁÁÁ 1 0 −1 −55 −35 −15 5 25 45 65 85 105 TA − Free-Air Temperature − °C 125 ÁÁ ÁÁ ÁÁ 2.5 TA = − 40°C 2 TA = 25°C 1.
PAGE 15
 SLOS156E − MAY 1996 − REVISED SEPTEMBER 2006 TYPICAL CHARACTERISTICS LOW-LEVEL OUTPUT VOLTAGE†‡ vs LOW-LEVEL OUTPUT CURRENT HIGH-LEVEL OUTPUT VOLTAGE†‡ vs HIGH-LEVEL OUTPUT CURRENT 1.4 5 VDD = 5 V VIC = 2.5 V ÁÁ ÁÁ 1.2 4 VOL − Low-Level Output Voltage − V VOH − High-Level Output Voltage − V TA = 125°C TA = 85°C TA = 25°C 3 TA = − 40°C 2 VDD = 5 V VIC = 2.5 V 0 200 TA = 85°C 0.8 TA = 25°C 0.6 0.
PAGE 16
 SLOS156E − MAY 1996 − REVISED SEPTEMBER 2006 TYPICAL CHARACTERISTICS SHORT-CIRCUIT OUTPUT CURRENT†‡ vs FREE-AIR TEMPERATURE OUTPUT VOLTAGE‡ vs DIFFERENTIAL INPUT VOLTAGE 3 VDD = 5 V VIC = 2.5 V VO = 2.5 V 12 10 VID = − 100 mV 8 6 4 2 −2 −75 −50 2 1.5 1 0.5 VID = 100 mV 0 VDD = 3 V RI = 10 kΩ VIC = 1.5 V TA = 25°C 2.
PAGE 17
 SLOS156E − MAY 1996 − REVISED SEPTEMBER 2006 TYPICAL CHARACTERISTICS LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE MARGIN† vs FREQUENCY 40 20 45° Phase Margin 10 0° 0 Gain −10 −20 φom m − Phase Margin AVD A VD − Large-Signal Differential Voltage Amplification − dB 30 ÁÁ ÁÁ 90° VDD = 3 V RL = 10 kΩ CL= 100 pF TA = 25°C −45° −30 −40 103 104 105 f − Frequency − Hz −90° 106 Figure 23 LARGE-SIGNAL DI
PAGE 18
 SLOS156E − MAY 1996 − REVISED SEPTEMBER 2006 TYPICAL CHARACTERISTICS LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION†‡ vs FREE-AIR TEMPERATURE LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION†‡ vs FREE-AIR TEMPERATURE 104 10 3 AVD − Large-Signal Differential Voltage Amplification − V/mV AVD − Large-Signal Differential Voltage Amplification − V/mV RL = 1 MΩ 10 2 10 1 RL = 10 kΩ VDD = 3 V VIC = 1.5 V VO = 0.
PAGE 19
 SLOS156E − MAY 1996 − REVISED SEPTEMBER 2006 TYPICAL CHARACTERISTICS COMMON-MODE REJECTION RATIO† vs FREQUENCY COMMON-MODE REJECTION RATIO†‡ vs FREE-AIR TEMPERATURE 88 TA = 25°C VDD = 5 V VO = 2.5 V 80 60 VDD = 3 V VO = 1.
PAGE 20
 SLOS156E − MAY 1996 − REVISED SEPTEMBER 2006 TYPICAL CHARACTERISTICS SUPPLY-VOLTAGE REJECTION RATIO† vs FREE-AIR TEMPERATURE SUPPLY CURRENT† vs SUPPLY VOLTAGE 30 VDD = 2.
PAGE 21
 SLOS156E − MAY 1996 − REVISED SEPTEMBER 2006 TYPICAL CHARACTERISTICS INVERTING LARGE-SIGNAL PULSE RESPONSE† INVERTING LARGE-SIGNAL PULSE RESPONSE† 3 5 VO − Output Voltage − V 2.5 2 1.5 1 3 2 1 0.
PAGE 22
 SLOS156E − MAY 1996 − REVISED SEPTEMBER 2006 TYPICAL CHARACTERISTICS INVERTING SMALL-SIGNAL PULSE RESPONSE† INVERTING SMALL-SIGNAL PULSE RESPONSE† 0.76 2.58 VDD = 3 V RL = 10 kΩ CL = 100 pF AV = − 1 TA = 25°C 2.56 VO VO − Output Voltage − V VO − Output Voltage − V 074 VDD = 5 V RL = 10 kΩ CL = 100 pF AV = − 1 TA = 25°C 0.72 0.7 0.68 0.66 2.54 2.52 2.5 2.48 2.46 0.64 0 10 20 30 40 2.
PAGE 23
 SLOS156E − MAY 1996 − REVISED SEPTEMBER 2006 TYPICAL CHARACTERISTICS EQUIVALENT INPUT NOISE VOLTAGE† vs FREQUENCY EQUIVALENT INPUT NOISE VOLTAGE† vs FREQUENCY 80 V n − Equivalent Input Noise Voltage − nV/ Hz V n − Equivalent Input Noise Voltage − nV/ Hz 80 VDD = 3 V RS = 20 Ω TA = 25°C 70 60 50 40 30 20 10 0 101 102 103 f − Frequency − Hz VDD = 5 V RS = 20 Ω TA = 25°C 70 60 50 40 30 20 10 0 101 104 102 Figure 46
PAGE 24
 SLOS156E − MAY 1996 − REVISED SEPTEMBER 2006 TYPICAL CHARACTERISTICS GAIN-BANDWIDTH PRODUCT vs SUPPLY VOLTAGE GAIN-BANDWIDTH PRODUCT†‡ vs FREE-AIR TEMPERATURE 80 80 Gain-Bandwidth Product − kHz 75 Gain-Bandwidth Product − kHz VDD = 5 V f = 10 kHz RL = 10 kΩ CL = 100 pF 70 65 60 RL = 10 kΩ CL = 100 pF TA 25°C 75 70 65 60 55 55 50 −75 50 −50 −25 0 25 50 75 100 TA − Free-Air Temperature − °C 0 125 1 2 3
PAGE 25
 SLOS156E − MAY 1996 − REVISED SEPTEMBER 2006 TYPICAL CHARACTERISTICS UNITY-GAIN BANDWIDTH vs LOAD CAPACITANCE 80 TA = 25°C B1 − Unity-Gain Bandwidth − kHz 70 60 50 40 30 ÁÁÁ ÁÁÁ 20 10 0 101 10 2 10 3 10 4 10 5 CL − Load Capacitance − pF 10 6 Figure 53 APPLICATION INFORMATION driving large capacitive loads The TLV2211 is designed to drive larger capacitive loads than most CMOS operational amplifiers.
PAGE 26
 SLOS156E − MAY 1996 − REVISED SEPTEMBER 2006 APPLICATION INFORMATION driving large capacitive loads (continued) The unity-gain bandwidth (UGBW) frequency decreases as the capacitive load increases (see Figure 54). To use equation 1, UGBW must be approximated from Figure 54. 10 kΩ VDD + VI 10 kΩ Rnull − + CL VDD − / GND Figure 54.
PAGE 27
 SLOS156E − MAY 1996 − REVISED SEPTEMBER 2006 APPLICATION INFORMATION macromodel information Macromodel information provided was derived using Microsim Parts, the model generation software used with Microsim PSpice. The Boyle macromodel (see Note 6) and subcircuit in Figure 54 are generated using the TLV2211 typical electrical and operating characteristics at TA = 25°C.
PAGE 28
PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) TLV2211CDBVR SOT-23 DBV 5 3000 180.0 TLV2211CDBVT SOT-23 DBV 5 250 TLV2211IDBVR SOT-23 DBV 5 3000 TLV2211IDBVT SOT-23 DBV 5 250 9.0 3.15 3.2 1.4 4.0 8.0 Q3 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3 180.0 9.
PAGE 29
PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TLV2211CDBVR SOT-23 DBV 5 3000 182.0 182.0 20.0 TLV2211CDBVT SOT-23 DBV 5 250 182.0 182.0 20.0 TLV2211IDBVR SOT-23 DBV 5 3000 182.0 182.0 20.0 TLV2211IDBVT SOT-23 DBV 5 250 182.0 182.0 20.
PAGE 30
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.