Datasheet
SLOS157B − JUNE1996 − REVISED APRIL 2005
3−1
WWW.TI.COM
D Output Swing Includes Both Supply Rails
D Low Noise . . . 19 nV/√Hz Typ at f = 1 kHz
D Low Input Bias Current ...1 pA Typ
D Fully Specified for Single-Supply 3-V and
5-V Operation
D Very Low Power ...110 µA Typ
D Common-Mode Input Voltage Range
Includes Negative Rail
D Wide Supply Voltage Range
2.7 V to 10 V
D Macromodel Included
description
The TLV2221 is a single low-voltage operational amplifier available in the SOT-23 package. It offers a
compromise between the ac performance and output drive of the TLV2231 and the micropower TLV2211.
It consumes only 150 µA (max) of supply current and is ideal for battery-powered applications. The device
exhibits rail-to-rail output performance for increased dynamic range in single- or split-supply applications. The
TLV2221 is fully characterized at 3 V and 5 V and is optimized for low-voltage applications.
The TLV2221, exhibiting high input impedance and low noise, is excellent for small-signal conditioning for
high-impedance sources, such as piezoelectric transducers. Because of the micropower dissipation levels
combined with 3-V operation, these devices work well in hand-held monitoring and remote-sensing
applications. In addition, the rail-to-rail output feature with single or split supplies makes this family a great
choice when interfacing with analog-to-digital converters (ADCs).
With a total area of 5.6mm
2
, the SOT-23 package only requires one third the board space of the standard 8-pin
SOIC package. This ultra-small package allows designers to place single amplifiers very close to the signal
source, minimizing noise pick-up from long PCB traces. TI has also taken special care to provide a pinout that
is optimized for board layout (see Figure 1). Both inputs are separated by GND to prevent coupling or leakage
paths. The OUT and IN− terminals are on the same end of the board to provide negative feedback. Finally, gain
setting resistors and decoupling capacitor are easily placed around the package.
V
I
V
DD+
OUTIN−
V
DD
/GND
IN+
C
R
I
R
F
GND
V+
V
O
1
2
3
4
5
Figure 1. Typical Surface Mount Layout for a Fixed-Gain Noninverting Amplifier
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f
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
DBV PACKAGE
(TOP VIEW)
5
43
1
2
IN−
V
DD−
/GND
IN+ V
DD+
OUT
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