Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLinear ICsLinear IC - Op-amp Multi-purpose SOT 23 5

 

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    

SLOS157B − JUNE1996 − REVISED APRIL 2005

3−1

WWW.TI.COM

D Output Swing Includes Both Supply Rails

D Low Noise . . . 19 nV/√Hz Typ at f = 1 kHz

D Low Input Bias Current ...1 pA Typ

D Fully Specified for Single-Supply 3-V and

5-V Operation

D Very Low Power ...110 µA Typ

D Common-Mode Input Voltage Range

Includes Negative Rail

D Wide Supply Voltage Range

2.7 V to 10 V

D Macromodel Included

description

The TLV2221 is a single low-voltage operational amplifier available in the SOT-23 package. It offers a

compromise between the ac performance and output drive of the TLV2231 and the micropower TLV2211.

It consumes only 150 µA (max) of supply current and is ideal for battery-powered applications. The device

exhibits rail-to-rail output performance for increased dynamic range in single- or split-supply applications. The

TLV2221 is fully characterized at 3 V and 5 V and is optimized for low-voltage applications.

The TLV2221, exhibiting high input impedance and low noise, is excellent for small-signal conditioning for

high-impedance sources, such as piezoelectric transducers. Because of the micropower dissipation levels

combined with 3-V operation, these devices work well in hand-held monitoring and remote-sensing

applications. In addition, the rail-to-rail output feature with single or split supplies makes this family a great

choice when interfacing with analog-to-digital converters (ADCs).

With a total area of 5.6mm

, the SOT-23 package only requires one third the board space of the standard 8-pin

SOIC package. This ultra-small package allows designers to place single amplifiers very close to the signal

source, minimizing noise pick-up from long PCB traces. TI has also taken special care to provide a pinout that

is optimized for board layout (see Figure 1). Both inputs are separated by GND to prevent coupling or leakage

paths. The OUT and IN− terminals are on the same end of the board to provide negative feedback. Finally, gain

setting resistors and decoupling capacitor are easily placed around the package.

DD+

OUTIN−

/GND

IN+

GND

V+

Figure 1. Typical Surface Mount Layout for a Fixed-Gain Noninverting Amplifier

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications o

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

DBV PACKAGE

(TOP VIEW)

IN−

DD−

/GND

IN+ V

DD+

OUT

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Advanced LinCMOS is a trademark of Texas Instruments Incorporated.

Summary of content (32 pages)

PAGE 1
 SLOS157B − JUNE1996 − REVISED APRIL 2005 D D D D D D D D DBV PACKAGE (TOP VIEW) Output Swing Includes Both Supply Rails Low Noise . . . 19 nV/√Hz Typ at f = 1 kHz Low Input Bias Current . . . 1 pA Typ Fully Specified for Single-Supply 3-V and 5-V Operation Very Low Power . . . 110 µA Typ Common-Mode Input Voltage Range Includes Negative Rail Wide Supply Voltage Range 2.
PAGE 2
 SLOS157B − JUNE1996 − REVISED APRIL 2005 AVAILABLE OPTIONS PACKAGED DEVICES TA VIOmax AT 25°C 0°C to 70°C 3 mV TLV2221CDBV VADC −40°C to 85°C 3 mV TLV2221IDBV VADI SOT-23 (DBV)† CHIP FORM‡ (Y) SYMBOL TLV2221Y † The DBV package available in tape and reel only. ‡ Chip forms are tested at TA = 25°C only.
PAGE 3
IN − IN + Q1 equivalent schematic • WWW.TI.
PAGE 4
 SLOS157B − JUNE 1996 − REVISED APRIL 2005 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 V Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 5
 SLOS157B − JUNE 1996 − REVISED APRIL 2005 electrical characteristics at specified free-air temperature, VDD = 3 V (unless otherwise noted) PARAMETER VIO Input offset voltage αVIO Temperature coefficient of input offset voltage Input offset voltage long-term drift (see Note 4) IIO Input offset current IIB Input bias current TA† TEST CONDITIONS TLV2221C MIN Full range VDD ± = ± 1.
PAGE 6
 SLOS157B − JUNE 1996 − REVISED APRIL 2005 operating characteristics at specified free-air temperature, VDD = 3 V PARAMETER RL = 2 kΩ‡, TLV2221C TA† MIN TYP 25°C 0.1 0.18 Full range 0.05 TEST CONDITIONS TLV2221I MAX MIN TYP 0.1 0.18 SR Slew rate at unity gain VO = 1.1 V to 1.
PAGE 7
 SLOS157B − JUNE 1996 − REVISED APRIL 2005 electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER VIO Input offset voltage αVIO Temperature coefficient of input offset voltage Input offset voltage long-term drift (see Note 4) IIO Input offset current IIB Input bias current TA† TEST CONDITIONS TLV2221C MIN Full range VDD ± = ± 2.
PAGE 8
 SLOS157B − JUNE 1996 − REVISED APRIL 2005 operating characteristics at specified free-air temperature, VDD = 5 V PARAMETER RL = 2 kΩ‡, TLV2221C TA† MIN TYP 25°C 0.1 0.18 Full range 0.05 TEST CONDITIONS TLV2221I MAX MIN TYP 0.1 0.18 SR Slew rate at unity gain VO = 1.5 V to 3.
PAGE 9
 SLOS157B − JUNE 1996 − REVISED APRIL 2005 electrical characteristics at VDD = 3 V, TA = 25°C (unless otherwise noted) PARAMETER VIO IIO Input offset voltage IIB Input bias current VICR VDD ± = ± 1.5 V, RS = 50 Ω VIC = 0, Common-mode input voltage range | VIO| ≤ 5 mV, RS = 50 Ω VOH High-level output voltage VOL Low-level output voltage IOH = − 100 µA VIC = 1.
PAGE 10
 SLOS157B − JUNE 1996 − REVISED APRIL 2005 TYPICAL CHARACTERISTICS Table of Graphs FIGURE VIO Input offset voltage Distribution vs Common-mode input voltage 2, 3 4, 5 αVIO IIB/IIO Input offset voltage temperature coefficient Distribution 6, 7 Input bias and input offset currents vs Free-air temperature 8 VI Input voltage vs Supply voltage vs Free-air temperature 9 10 VOH VOL High-level output voltage v
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 SLOS157B − JUNE 1996 − REVISED APRIL 2005 TYPICAL CHARACTERISTICS DISTRIBUTION OF TLV2211 INPUT OFFSET VOLTAGE DISTRIBUTION OF TLV2211 INPUT OFFSET VOLTAGE 25 20 385 Amplifiers From 1 Wafer Lot VDD = ± 1.5 V TA = 25°C Precentage of Amplifiers − % Precentage of Amplifiers − % 25 15 10 20 15 10 5 5 0 385 Amplifiers From 1 Wafer Lot VDD = ± 2.5 V TA = 25°C −1.5 −1 −0.5 0 0.
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 SLOS157B − JUNE 1996 − REVISED APRIL 2005 TYPICAL CHARACTERISTICS DISTRIBUTION OF TLV2221 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT† DISTRIBUTION OF TLV2221 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT† 25 32 Amplifiers From 1 Wafer Lot VDD = ± 1.
PAGE 13
 SLOS157B − JUNE 1996 − REVISED APRIL 2005 TYPICAL CHARACTERISTICS INPUT VOLTAGE†‡ vs FREE-AIR TEMPERATURE HIGH-LEVEL OUTPUT VOLTAGE†‡ vs HIGH-LEVEL OUTPUT CURRENT 3 5 VDD = 3 V VDD = 5 V 2.5 VOH − High-Level Output Voltage − V 4 VI − Input Voltage − V 3 |VIO| ≤ 5 mV 2 ÁÁ 1 0 −1 −55 −35 −15 5 25 45 65 85 105 TA − Free-Air Temperature − °C 125 TA = − 40°C 2 TA = 25°C 1.
PAGE 14
 SLOS157B − JUNE 1996 − REVISED APRIL 2005 TYPICAL CHARACTERISTICS LOW-LEVEL OUTPUT VOLTAGE†‡ vs LOW-LEVEL OUTPUT CURRENT HIGH-LEVEL OUTPUT VOLTAGE†‡ vs HIGH-LEVEL OUTPUT CURRENT 1.4 5 ÁÁ ÁÁ 4 TA = − 40°C TA = 25°C 3 TA = 85°C 2 TA = 125°C ÁÁ ÁÁ 1 0 0 1 2 3 4 5 6 7 VDD = 5 V VIC = 2.5 V 1.2 VOL − Low-Level Output Voltage − V VOH − High-Level Output Voltage − V VDD = 5 V VIC = 2.
PAGE 15
 SLOS157B − JUNE 1996 − REVISED APRIL 2005 TYPICAL CHARACTERISTICS SHORT-CIRCUIT OUTPUT CURRENT †‡ vs FREE-AIR TEMPERATURE OUTPUT VOLTAGE‡ vs DIFFERENTIAL INPUT VOLTAGE 3 VDD = 5 V VIC = 2.5 V VO = 2.5 V 16 12 VID = − 100 mV 8 4 0 VID = 100 mV 2 1.5 1 0.5 −4 −8 −75 VDD = 3 V RI = 2 kΩ VIC = 1.5 V TA = 25°C 2.
PAGE 16
 SLOS157B − JUNE 1996 − REVISED APRIL 2005 TYPICAL CHARACTERISTICS LARGE-SIGNAL DIFFERENTIAL VOLTAGE† AMPLIFICATION AND PHASE MARGIN vs FREQUENCY ÁÁ ÁÁ 60 180° VDD = 5 V RL = 2 kΩ CL= 100 pF TA = 25°C 135° 90° 40 Phase Margin 45° 20 Gain 0 0° φom m − Phase Margin AVD A VD − Large-Signal Differential Voltage Amplification − dB 80 −45° −20 −40 104 105 106 f − Frequency − Hz −90° 107 Figure 22 LARGE-SIG
PAGE 17
 SLOS157B − JUNE 1996 − REVISED APRIL 2005 TYPICAL CHARACTERISTICS LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION†‡ vs FREE-AIR TEMPERATURE LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION†‡ vs FREE-AIR TEMPERATURE 10 4 VDD = 3 V VIC = 1.5 V VO = 0.5 V to 2.
PAGE 18
 SLOS157B − JUNE 1996 − REVISED APRIL 2005 TYPICAL CHARACTERISTICS COMMON-MODE REJECTION RATIO†‡ vs FREE-AIR TEMPERATURE COMMON-MODE REJECTION RATIO† vs FREQUENCY 88 CMMR − Common-Mode Rejection Ratio − dB CMRR − Common-Mode Rejection Ratio − dB 100 TA = 25°C VDD = 5 V VIC = 2.5 V 80 VDD = 3 V 60 VIC = 1.
PAGE 19
 SLOS157B − JUNE 1996 − REVISED APRIL 2005 TYPICAL CHARACTERISTICS SUPPLY CURRENT † vs SUPPLY VOLTAGE SUPPLY-VOLTAGE REJECTION RATIO† vs FREE-AIR TEMPERATURE 200 VDD = 2.
PAGE 20
 SLOS157B − JUNE 1996 − REVISED APRIL 2005 TYPICAL CHARACTERISTICS INVERTING LARGE-SIGNAL PULSE RESPONSE† INVERTING LARGE-SIGNAL PULSE RESPONSE† 5 3 VDD = 3 V RL = 2 kΩ CL = 100 pF AV = −1 TA = 25°C 4 VO − Output Voltage − V VO − Output Voltage − V 2.5 VDD = 5 V RL = 2 kΩ CL = 100 pF AV = − 1 TA = 25°C 2 1.5 1 3 2 1 0.
PAGE 21
 SLOS157B − JUNE 1996 − REVISED APRIL 2005 TYPICAL CHARACTERISTICS INVERTING SMALL-SIGNAL PULSE RESPONSE† INVERTING SMALL-SIGNAL PULSE RESPONSE† 0.82 2.58 VDD = 3 V RL = 2 kΩ CL = 100 pF AV = − 1 TA = 25°C 2.56 VO VO − Output Voltage − V VO − Output Voltage − V 0.8 VDD = 5 V RL = 2 kΩ CL = 100 pF AV = − 1 TA = 25°C 0.78 0.76 0.74 0.72 2.54 2.52 2.5 2.48 2.46 0.7 0 2.44 0.5 1 1.5 2 2.5 3 3.5 4 4.
PAGE 22
 SLOS157B − JUNE 1996 − REVISED APRIL 2005 TYPICAL CHARACTERISTICS EQUIVALENT INPUT NOISE VOLTAGE† vs FREQUENCY EQUIVALENT INPUT NOISE VOLTAGE† vs FREQUENCY 120 V n − Equivalent Input Noise Voltage − nV/ Hz V n − Equivalent Input Noise Voltage − nV/ Hz 120 VDD = 3 V RS = 20 Ω TA = 25°C 100 80 60 40 20 0 10 1 10 2 10 3 VDD = 5 V RS = 20 Ω TA = 25°C 100 80 60 40 20 0 101 10 4 10 2 Figure 44 Figure 4
PAGE 23
 SLOS157B − JUNE 1996 − REVISED APRIL 2005 TYPICAL CHARACTERISTICS GAIN-BANDWIDTH PRODUCT †‡ vs FREE-AIR TEMPERATURE GAIN-BANDWIDTH PRODUCT vs SUPPLY VOLTAGE 600 VDD = 5 V f = 10 kHz RL = 2 kHz CL = 100 pF 700 RL = 2k CL = 100 pF TA = 25°C 575 Gain-Bandwidth Product − kHz Gain-Bandwidth Product − kHz 800 600 500 400 300 550 525 500 475 450 425 200 −75 −50 −25 0 25 50 75 100 TA − Free-Air Temperature − °C
PAGE 24
 SLOS157B − JUNE 1996 − REVISED APRIL 2005 TYPICAL CHARACTERISTICS PHASE MARGIN vs LOAD CAPACITANCE PHASE MARGIN vs LOAD CAPACITANCE 75° 75° TA = 25°C RL = ∞ TA = 25°C RL = 2 kΩ Rnull = 500 Ω Rnull = 1 kΩ 60° φom m − Phase Margin φom m − Phase Margin 60° 45° 30° 45° Rnull = 500 Ω 30° Rnull = 0 Rnull = 0 Rnull = 200 Ω 15° Rnull = 1 kΩ 15° Rnull = 100 Ω 0° 101 10 2 10 3 10 4 CL − Load Capacitance − pF
PAGE 25
 SLOS157B − JUNE 1996 − REVISED APRIL 2005 APPLICATION INFORMATION driving large capacitive loads The TLV2221 is designed to drive larger capacitive loads than most CMOS operational amplifiers. Figure 50 through Figure 55 illustrate its ability to drive loads greater than 100 pF while maintaining good gain and phase margins (Rnull = 0).
PAGE 26
 SLOS157B − JUNE 1996 − REVISED APRIL 2005 APPLICATION INFORMATION macromodel information Macromodel information provided was derived using Microsim Parts, the model generation software used with Microsim PSpice. The Boyle macromodel (see Note 6) and subcircuit in Figure 57 are generated using the TLV2221 typical electrical and operating characteristics at TA = 25°C.
PAGE 27
PACKAGE OPTION ADDENDUM www.ti.
PAGE 28
PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.
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PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) TLV2221CDBVR SOT-23 DBV 5 3000 180.0 TLV2221CDBVT SOT-23 DBV 5 250 TLV2221IDBVR SOT-23 DBV 5 3000 TLV2221IDBVT SOT-23 DBV 5 250 9.0 3.15 3.2 1.4 4.0 8.0 Q3 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3 180.0 9.
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PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TLV2221CDBVR SOT-23 DBV 5 3000 182.0 182.0 20.0 TLV2221CDBVT SOT-23 DBV 5 250 182.0 182.0 20.0 TLV2221IDBVR SOT-23 DBV 5 3000 182.0 182.0 20.0 TLV2221IDBVT SOT-23 DBV 5 250 182.0 182.0 20.
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