TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 D D D D D D D D TLV2322 D OR P PACKAGE (TOP VIEW) Wide Range of Supply Voltages Over Specified Temperature Range: TA = – 40°C to 85°C . . . 2 V to 8 V Fully Characterized at 3 V and 5 V Single-Supply Operation Common-Mode Input Voltage Range Extends Below the Negative Rail and up to VDD –1 V at TA = 25°C Output Voltage Range Includes Negative Rail High Input Impedance . . .
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 description (continued) Low-voltage and low-power operation has been made possible by using the Texas Instruments silicon-gate LinCMOS technology. The LinCMOS process also features extremely high input impedance and ultra-low bias currents making these amplifiers ideal for interfacing to high-impedance sources such as sensor circuits or filter applications.
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TLV2324Y chip information This chip, when properly assembled, display characteristics similar to the TLV2324. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform.
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 equivalent schematic (each amplifier) VDD P3 P4 R6 P1 IN – P2 N5 R2 R1 IN + R5 P5 C1 N3 P6 OUT N4 N1 R3 D1 N2 N6 R4 N7 D2 R7 GND ACTUAL DEVICE COMPONENT COUNT† COMPONENT TLV2342 TLV2344 Transistors 54 108 Resistors 14 28 Diodes 4 8 Capacitors 2 4 † Includes both amplifiers and all ESD, bias, and trim circuitry.
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 absolute maximum ratings over operating free-air temperature (unless otherwise noted)† Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TLV2322 electrical characteristics at specified free-air temperature TLV2322 PARAMETER VIO Input offset voltage TEST CONDITIONS TA† VDD = 3 V MIN TYP MAX VDD = 5 V MIN TYP MAX VO = 1 V, VIC = 1 V,, RS = 50 Ω, RL = 1 MΩ 25°C 1.1 1.1 11 Average temperature coefficient of input offset voltage IIO Input offset current (see Note 4) VO = 1 V,, VIC = 1 V 25°C 0.
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TLV2322 operating characteristics at specified free-air temperature, VDD = 3 V PARAMETER SR Slew rate at unity gain TEST CONDITIONS VIC = 1 V, RL = 1 MΩ, MΩ S Figure See Fi 35 VI(PP) = 1 V, CL = 20 pF F, TA TLV2322 MIN TYP 25°C 0.02 85°C 0 02 0.
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TLV2324I electrical characteristics at specified free-air temperature TLV2324I PARAMETER VIO Input offset voltage TEST CONDITIONS VO = 1 V, VIC = 1 V,, RS = 50 Ω, RL = 1 MΩ, TA† VDD = 3 V MIN TYP MAX VDD = 5 V MIN TYP MAX 25°C 11 1.1 11 1.
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TLV2324I operating characteristics at specified free-air temperature, VDD = 3 V PARAMETER SR Slew rate at unity gain TEST CONDITIONS VIC = 1 V V, RL = 1 MΩ, MΩ S Figure See Fi 35 VI(PP) = 1 V V, CL = 20 pF, pF TA TLV2324I MIN TYP 25°C 0 02 0.02 85°C 0 02 0.
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TLV2322Y electrical characteristics, TA = 25°C TLV2322Y PARAMETER VIO Input offset voltage IIO IIB Input offset current (see Note 4) Input bias current (see Note 4) TEST CONDITIONS VO = 1 V, RS = 50 Ω, VIC = 1 V, RL = 1 MΩ VO = 1 V, VO = 1 V, VIC = 1 V VIC = 1 V VDD = 3 V MIN TYP MAX VDD = 5 V TYP MAX UNIT MIN 1.1 1.1 mV 0.1 0.1 pA 0.6 0.6 pA – 0.3 to 2.3 – 0.3 to 4.
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TLV2322Y electrical characteristics,TA = 25°C TLV2324Y PARAMETER VIO Input offset voltage IIO IIB Input offset current (see Note 4) Input bias current (see Note 4) TEST CONDITIONS VO = 1 V, RS = 50 Ω, VIC = 1 V, RL = 1 M Ω VO = 1 V, VO = 1 V, VIC = 1 V VIC = 1 V VDD = 3 V MIN TYP MAX VDD = 5 V TYP MAX UNIT MIN 1.1 1.1 mV 0.1 0.1 pA 0.6 0.6 pA – 0.3 to 2.3 – 0.3 to 4.
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TYPICAL CHARACTERISTICS Table of Graphs FIGURE VIO αVIO Input offset voltage Distribution 1–4 Input offset voltage temperature coefficient Distribution 5–8 IIB IIO Input bias current vs Free-air temperature Input offset current vs Free-air temperature 9 VIC Common-mode input voltage vs Supply voltage 10 VOH High-level output voltage vs High-level output current vs Supply vol
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TYPICAL CHARACTERISTICS DISTRIBUTION OF TLV2322 INPUT OFFSET VOLTAGE DISTRIBUTION OF TLV2322 INPUT OFFSET VOLTAGE 50 VDD = 3 V TA = 25°C P Package 60 Percentage of Units – % Percentage of Units – % 40 70 30 20 VDD = 5 V TA = 25°C P Package 50 40 30 20 10 10 0 –5 –4 –3 –2 –1 0 1 2 3 4 0 –5 5 –4 –3 VIO – Input Offset Voltage – mV –2 –1 0 1 2 3 4 5 4 5 VIO – Inp
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TYPICAL CHARACTERISTICS DISTRIBUTION OF TLV2322 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT DISTRIBUTION OF TLV2322 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT 70 50 VDD = 3 V TA = 25°C to 85°C P Package VDD = 5 V TA = 25°C to 85°C P Package Outliers: (1) 19.2 mV/°C (1) 12.
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TYPICAL CHARACTERISTICS COMMON-MODE INPUT VOLTAGE vs SUPPLY VOLTAGE 104 103 8 VDD = 3 V VIC = 1 V See Note A TA = 25°C Positive Limit 102 V VIC IC – Common-Mode Input Voltage – V IIIB I IO – Input Bias and Offset Currents – pA IB and IIO INPUT BIAS CURRENT AND INPUT OFFSET CURRENT vs FREE-AIR TEMPERATURE IIB 101 IIO 1 0.
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TYPICAL CHARACTERISTICS LOW-LEVEL OUTPUT VOLTAGE vs COMMON-MODE INPUT VOLTAGE HIGH-LEVEL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE 700 2.4 VDD = 3 V VIC = 1 V VID = 100 mV 1.8 1.2 0.
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TYPICAL CHARACTERISTICS LOW-LEVEL OUTPUT VOLTAGE vs DIFFERENTIAL INPUT VOLTAGE LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 1 VDD = 5 V VIC = |VID / 2| IOL = 5 mA TA = 25°C 700 600 VIC = 1 V VID = – 1 V TA = 25°C 0.9 VOL V OL – Low-Level Output Voltage – mV VOL V OL – Low-Level Output Voltage – mV 800 500 400 300 200 100 0 0.8 VDD = 5 V 0.7 0.6 0.5 0.4 VDD = 3 V 0.3 0.2 0.
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TYPICAL CHARACTERISTICS LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE SHIFT vs FREQUENCY 10 7 10 6 10 5 – 30° 0° 10 4 30° AVD 10 3 60° 10 2 Phase Shift AVD – Large-Signal Differential Voltage Amplification – 60° VDD = 3 V RL = 1 MΩ CL = 20 pF TA = 25°C 90° Phase Shift 10 1 120° 1 150° 0.
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TYPICAL CHARACTERISTICS TLV2322 SUPPLY CURRENT vs FREE-AIR TEMPERATURE SUPPLY CURRENT vs SUPPLY VOLTAGE 45 40 VIC = 1 V VO = 1 V No Load 30 35 A mA IIDD DD – Supply Current – µ A mA IIDD DD – Supply Current – µ 35 VIC = 1 V VO = 1 V No Load 30 TA = – 40°C TA = 25°C 25 20 15 TA = 85°C 25 VDD = 5 V 20 15 VDD = 3 V 10 10 5 5 0 0 2 4 6 0 – 75 8 – 50 VDD – Supply Voltage – V
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TYPICAL CHARACTERISTICS MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE vs FREQUENCY 0.07 VIC = 1 V VI(PP) = 1 V AV = 1 RL = 1 MΩ CL = 20 pF SR – Slew Rate – V/us V/µ s 0.06 0.05 0.04 VDD = 5 V 0.03 VDD = 3 V 0.02 0.
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TYPICAL CHARACTERISTICS PHASE MARGIN vs SUPPLY VOLTAGE PHASE MARGIN vs FREE-AIR TEMPERATURE 42° 40° VDD = 3 V 38° 36° 38° φom m – Phase Margin φom m – Phase Margin 40° VI = 10 mV RL = 1 MΩ CL = 20 pF TA = 25°C 36° 34° VDD = 5 V 34° 32° 30° 28° 26° 24° 32° 22° 30° 0 2 4 6 20° – 75 8 VI = 10 mV RL = 1 MΩ CL = 20 pF – 50 VDD – Supply Voltage – V Figure 31 EQUIVALENT INPUT
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 PARAMETER MEASUREMENT INFORMATION single-supply versus split-supply test circuits Because the TLV232x is optimized for single-supply operation, circuit configurations used for the various tests often present some inconvenience since the input signal, in many cases, must be offset from ground.
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 PARAMETER MEASUREMENT INFORMATION input bias current Because of the high input impedance of the TLV232x operational amplifier, attempts to measure the input bias current can result in erroneous readings. The bias current at normal ambient temperature is typically less than 1 pA, a value that is easily exceeded by leakages on the test socket.
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 PARAMETER MEASUREMENT INFORMATION generally measured by monitoring the distortion level of the output while increasing the frequency of a sinusoidal input signal until the maximum frequency is found above which the output contains significant distortion.
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 APPLICATION INFORMATION single-supply operation (continued) The TLV232x works well in conjunction with digital logic; however, when powering both linear devices and digital logic from the same power supply, the following precautions are recommended: • • Power the linear devices from separate bypassed supply lines (see Figure 41); otherwise, the linear device supply rails can fluctuate due to
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 APPLICATION INFORMATION input characteristics (continued) – Vi + VO VI – + (a) NONINVERTING AMPLIFIER (b) INVERTING AMPLIFIER – VO + VI VO (c) UNITY-GAIN AMPLIFIER Figure 42. Guard-Ring Schemes noise performance The noise specifications in operational amplifier circuits are greatly dependent on the current in the first-stage differential amplifier.
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 APPLICATION INFORMATION by more than 300 mV. Care should be exercised when using capacitive coupling on pulse generators. Supply transients should be shunted by the use of decoupling capacitors (0.1 µF typical) located across the supply rails as close to the device as possible.
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 APPLICATION INFORMATION output characteristics (continued) (a) CL = 20 pF, RL = NO LOAD (b) CL = 260 pF, RL = NO LOAD Figure 46.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device TLV2322IDR Package Package Pins Type Drawing SOIC SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2322IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2322IPWR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1 TLV2324IDR SOIC D 14 2500 330.
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TLV2322IDR SOIC D 8 2500 340.5 338.1 20.6 TLV2322IDR SOIC D 8 2500 367.0 367.0 35.0 TLV2322IPWR TSSOP PW 8 2000 367.0 367.0 35.0 TLV2324IDR SOIC D 14 2500 367.0 367.0 38.0 TLV2324IPWR TSSOP PW 14 2000 367.0 367.0 35.
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