Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLinear ICsLinear IC - Op-amp Multi-purpose PDIP 14

TLV2322, TLV2322Y, TLV2324, TLV2324Y

LinCMOS LOW-VOLTAGE LOW-POWER

OPERATIONAL AMPLIFIERS

SLOS187 – FEBRUARY 1997

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Wide Range of Supply Voltages Over

Specified Temperature Range:

= –40°C to 85°C...2 V to 8 V

Fully Characterized at 3 V and 5 V

Single-Supply Operation

Common-Mode Input Voltage Range

Extends Below the Negative Rail and up to

–1 V at T

= 25°C

Output Voltage Range Includes Negative

Rail

High Input Impedance...10

Ω Typical

ESD-Protection Circuitry

Designed-In Latch-Up Immunity

description

The TLV232x operational amplifiers are in a family

of devices that has been specifically designed for

use in low-voltage single-supply applications.

This amplifier is especially well suited to

ultra-low-power systems that require devices to

consume the absolute minimum of supply

currents. Each amplifier is fully functional down to

a minimum supply voltage of 2 V, is fully

characterized, tested, and specified at both 3-V

and 5-V power supplies. The common-mode input

voltage range includes the negative rail and

extends to within 1 V of the positive rail.

These amplifiers are specifically targeted for use

in very low-power, portable, battery-driven

applications with the maximum supply current per

operational amplifier specified at only 27 µA over

its full temperature range of –40°C to 85°C.

AVAILABLE OPTIONS

V max AT

PACKAGED DEVICES

CHIP FORM

max

25°C

SMALL OUTLINE

†

(D)

PLASTIC DIP

(N)

PLASTIC DIP

(P)

TSSOP

‡

(PW)

CHIP

FORM

(Y)

Cto85

9 mV TLV2322ID — TLV2322IP TLV2322IPWLE TLV2322Y

–

40°C

85°C

10 mV TLV2324ID TLV2324IN — TLV2324IPWLE TLV2324Y

†

The D package is available taped and reeled. Add R suffix to the device type (e.g., TLV2322IDR).

‡

The PW package is only available left-end taped and reeled (e.g., TLV2322IPWLE).

Chip forms are tested at 25°C only.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

LinCMOS is a trademark of Texas Instruments Incorporated.

1OUT

1IN–

1IN+

DD–

/GND

2OUT

2IN–

2IN+

1OUT

1IN–

1IN+

DD –

/GND

DD+

2OUT

2IN–

2IN+

1OUT

1IN –

1IN +

DD+

2IN +

2IN –

2OUT

4OUT

4IN –

4IN +

DD –

/GND

3IN +

3IN –

3OUT

4OUT

4IN –

4IN +

DD –

/GND

3IN +

3IN –

3OUT

1OUT

1IN –

1IN +

DD+

2IN +

2IN –

2OUT

TLV2322

D OR P PACKAGE

(TOP VIEW)

TLV2322

PW PACKAGE

(TOP VIEW)

TLV2324

D OR N PACKAGE

(TOP VIEW)

TLV2324

PW PACKAGE

(TOP VIEW)

Summary of content (33 pages)

PAGE 1
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 D D D D D D D D TLV2322 D OR P PACKAGE (TOP VIEW) Wide Range of Supply Voltages Over Specified Temperature Range: TA = – 40°C to 85°C . . . 2 V to 8 V Fully Characterized at 3 V and 5 V Single-Supply Operation Common-Mode Input Voltage Range Extends Below the Negative Rail and up to VDD –1 V at TA = 25°C Output Voltage Range Includes Negative Rail High Input Impedance . . .
PAGE 2
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 description (continued) Low-voltage and low-power operation has been made possible by using the Texas Instruments silicon-gate LinCMOS technology. The LinCMOS process also features extremely high input impedance and ultra-low bias currents making these amplifiers ideal for interfacing to high-impedance sources such as sensor circuits or filter applications.
PAGE 3
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TLV2324Y chip information This chip, when properly assembled, display characteristics similar to the TLV2324. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform.
PAGE 4
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 equivalent schematic (each amplifier) VDD P3 P4 R6 P1 IN – P2 N5 R2 R1 IN + R5 P5 C1 N3 P6 OUT N4 N1 R3 D1 N2 N6 R4 N7 D2 R7 GND ACTUAL DEVICE COMPONENT COUNT† COMPONENT TLV2342 TLV2344 Transistors 54 108 Resistors 14 28 Diodes 4 8 Capacitors 2 4 † Includes both amplifiers and all ESD, bias, and trim circuitry.
PAGE 5
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 absolute maximum ratings over operating free-air temperature (unless otherwise noted)† Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 6
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TLV2322 electrical characteristics at specified free-air temperature TLV2322 PARAMETER VIO Input offset voltage TEST CONDITIONS TA† VDD = 3 V MIN TYP MAX VDD = 5 V MIN TYP MAX VO = 1 V, VIC = 1 V,, RS = 50 Ω, RL = 1 MΩ 25°C 1.1 1.1 11 Average temperature coefficient of input offset voltage IIO Input offset current (see Note 4) VO = 1 V,, VIC = 1 V 25°C 0.
PAGE 7
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TLV2322 operating characteristics at specified free-air temperature, VDD = 3 V PARAMETER SR Slew rate at unity gain TEST CONDITIONS VIC = 1 V, RL = 1 MΩ, MΩ S Figure See Fi 35 VI(PP) = 1 V, CL = 20 pF F, TA TLV2322 MIN TYP 25°C 0.02 85°C 0 02 0.
PAGE 8
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TLV2324I electrical characteristics at specified free-air temperature TLV2324I PARAMETER VIO Input offset voltage TEST CONDITIONS VO = 1 V, VIC = 1 V,, RS = 50 Ω, RL = 1 MΩ, TA† VDD = 3 V MIN TYP MAX VDD = 5 V MIN TYP MAX 25°C 11 1.1 11 1.
PAGE 9
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TLV2324I operating characteristics at specified free-air temperature, VDD = 3 V PARAMETER SR Slew rate at unity gain TEST CONDITIONS VIC = 1 V V, RL = 1 MΩ, MΩ S Figure See Fi 35 VI(PP) = 1 V V, CL = 20 pF, pF TA TLV2324I MIN TYP 25°C 0 02 0.02 85°C 0 02 0.
PAGE 10
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TLV2322Y electrical characteristics, TA = 25°C TLV2322Y PARAMETER VIO Input offset voltage IIO IIB Input offset current (see Note 4) Input bias current (see Note 4) TEST CONDITIONS VO = 1 V, RS = 50 Ω, VIC = 1 V, RL = 1 MΩ VO = 1 V, VO = 1 V, VIC = 1 V VIC = 1 V VDD = 3 V MIN TYP MAX VDD = 5 V TYP MAX UNIT MIN 1.1 1.1 mV 0.1 0.1 pA 0.6 0.6 pA – 0.3 to 2.3 – 0.3 to 4.
PAGE 11
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TLV2322Y electrical characteristics,TA = 25°C TLV2324Y PARAMETER VIO Input offset voltage IIO IIB Input offset current (see Note 4) Input bias current (see Note 4) TEST CONDITIONS VO = 1 V, RS = 50 Ω, VIC = 1 V, RL = 1 M Ω VO = 1 V, VO = 1 V, VIC = 1 V VIC = 1 V VDD = 3 V MIN TYP MAX VDD = 5 V TYP MAX UNIT MIN 1.1 1.1 mV 0.1 0.1 pA 0.6 0.6 pA – 0.3 to 2.3 – 0.3 to 4.
PAGE 12
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TYPICAL CHARACTERISTICS Table of Graphs FIGURE VIO αVIO Input offset voltage Distribution 1–4 Input offset voltage temperature coefficient Distribution 5–8 IIB IIO Input bias current vs Free-air temperature Input offset current vs Free-air temperature 9 VIC Common-mode input voltage vs Supply voltage 10 VOH High-level output voltage vs High-level output current vs Supply vol
PAGE 13
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TYPICAL CHARACTERISTICS DISTRIBUTION OF TLV2322 INPUT OFFSET VOLTAGE DISTRIBUTION OF TLV2322 INPUT OFFSET VOLTAGE 50 VDD = 3 V TA = 25°C P Package 60 Percentage of Units – % Percentage of Units – % 40 70 30 20 VDD = 5 V TA = 25°C P Package 50 40 30 20 10 10 0 –5 –4 –3 –2 –1 0 1 2 3 4 0 –5 5 –4 –3 VIO – Input Offset Voltage – mV –2 –1 0 1 2 3 4 5 4 5 VIO – Inp
PAGE 14
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TYPICAL CHARACTERISTICS DISTRIBUTION OF TLV2322 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT DISTRIBUTION OF TLV2322 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT 70 50 VDD = 3 V TA = 25°C to 85°C P Package VDD = 5 V TA = 25°C to 85°C P Package Outliers: (1) 19.2 mV/°C (1) 12.
PAGE 15
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TYPICAL CHARACTERISTICS COMMON-MODE INPUT VOLTAGE vs SUPPLY VOLTAGE 104 103 8 VDD = 3 V VIC = 1 V See Note A TA = 25°C Positive Limit 102 V VIC IC – Common-Mode Input Voltage – V IIIB I IO – Input Bias and Offset Currents – pA IB and IIO INPUT BIAS CURRENT AND INPUT OFFSET CURRENT vs FREE-AIR TEMPERATURE IIB 101 IIO 1 0.
PAGE 16
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TYPICAL CHARACTERISTICS LOW-LEVEL OUTPUT VOLTAGE vs COMMON-MODE INPUT VOLTAGE HIGH-LEVEL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE 700 2.4 VDD = 3 V VIC = 1 V VID = 100 mV 1.8 1.2 0.
PAGE 17
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TYPICAL CHARACTERISTICS LOW-LEVEL OUTPUT VOLTAGE vs DIFFERENTIAL INPUT VOLTAGE LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 1 VDD = 5 V VIC = |VID / 2| IOL = 5 mA TA = 25°C 700 600 VIC = 1 V VID = – 1 V TA = 25°C 0.9 VOL V OL – Low-Level Output Voltage – mV VOL V OL – Low-Level Output Voltage – mV 800 500 400 300 200 100 0 0.8 VDD = 5 V 0.7 0.6 0.5 0.4 VDD = 3 V 0.3 0.2 0.
PAGE 18
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TYPICAL CHARACTERISTICS LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE SHIFT vs FREQUENCY 10 7 10 6 10 5 – 30° 0° 10 4 30° AVD 10 3 60° 10 2 Phase Shift AVD – Large-Signal Differential Voltage Amplification – 60° VDD = 3 V RL = 1 MΩ CL = 20 pF TA = 25°C 90° Phase Shift 10 1 120° 1 150° 0.
PAGE 19
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TYPICAL CHARACTERISTICS TLV2322 SUPPLY CURRENT vs FREE-AIR TEMPERATURE SUPPLY CURRENT vs SUPPLY VOLTAGE 45 40 VIC = 1 V VO = 1 V No Load 30 35 A mA IIDD DD – Supply Current – µ A mA IIDD DD – Supply Current – µ 35 VIC = 1 V VO = 1 V No Load 30 TA = – 40°C TA = 25°C 25 20 15 TA = 85°C 25 VDD = 5 V 20 15 VDD = 3 V 10 10 5 5 0 0 2 4 6 0 – 75 8 – 50 VDD – Supply Voltage – V
PAGE 20
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TYPICAL CHARACTERISTICS MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE vs FREQUENCY 0.07 VIC = 1 V VI(PP) = 1 V AV = 1 RL = 1 MΩ CL = 20 pF SR – Slew Rate – V/us V/µ s 0.06 0.05 0.04 VDD = 5 V 0.03 VDD = 3 V 0.02 0.
PAGE 21
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 TYPICAL CHARACTERISTICS PHASE MARGIN vs SUPPLY VOLTAGE PHASE MARGIN vs FREE-AIR TEMPERATURE 42° 40° VDD = 3 V 38° 36° 38° φom m – Phase Margin φom m – Phase Margin 40° VI = 10 mV RL = 1 MΩ CL = 20 pF TA = 25°C 36° 34° VDD = 5 V 34° 32° 30° 28° 26° 24° 32° 22° 30° 0 2 4 6 20° – 75 8 VI = 10 mV RL = 1 MΩ CL = 20 pF – 50 VDD – Supply Voltage – V Figure 31 EQUIVALENT INPUT
PAGE 22
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 PARAMETER MEASUREMENT INFORMATION single-supply versus split-supply test circuits Because the TLV232x is optimized for single-supply operation, circuit configurations used for the various tests often present some inconvenience since the input signal, in many cases, must be offset from ground.
PAGE 23
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 PARAMETER MEASUREMENT INFORMATION input bias current Because of the high input impedance of the TLV232x operational amplifier, attempts to measure the input bias current can result in erroneous readings. The bias current at normal ambient temperature is typically less than 1 pA, a value that is easily exceeded by leakages on the test socket.
PAGE 24
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 PARAMETER MEASUREMENT INFORMATION generally measured by monitoring the distortion level of the output while increasing the frequency of a sinusoidal input signal until the maximum frequency is found above which the output contains significant distortion.
PAGE 25
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 APPLICATION INFORMATION single-supply operation (continued) The TLV232x works well in conjunction with digital logic; however, when powering both linear devices and digital logic from the same power supply, the following precautions are recommended: • • Power the linear devices from separate bypassed supply lines (see Figure 41); otherwise, the linear device supply rails can fluctuate due to
PAGE 26
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 APPLICATION INFORMATION input characteristics (continued) – Vi + VO VI – + (a) NONINVERTING AMPLIFIER (b) INVERTING AMPLIFIER – VO + VI VO (c) UNITY-GAIN AMPLIFIER Figure 42. Guard-Ring Schemes noise performance The noise specifications in operational amplifier circuits are greatly dependent on the current in the first-stage differential amplifier.
PAGE 27
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 APPLICATION INFORMATION by more than 300 mV. Care should be exercised when using capacitive coupling on pulse generators. Supply transients should be shunted by the use of decoupling capacitors (0.1 µF typical) located across the supply rails as close to the device as possible.
PAGE 28
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS SLOS187 – FEBRUARY 1997 APPLICATION INFORMATION output characteristics (continued) (a) CL = 20 pF, RL = NO LOAD (b) CL = 260 pF, RL = NO LOAD Figure 46.
PAGE 29
PACKAGE OPTION ADDENDUM www.ti.
PAGE 30
PACKAGE OPTION ADDENDUM www.ti.com 8-Dec-2008 (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined.
PAGE 31
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device TLV2322IDR Package Package Pins Type Drawing SOIC SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2322IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2322IPWR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1 TLV2324IDR SOIC D 14 2500 330.
PAGE 32
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TLV2322IDR SOIC D 8 2500 340.5 338.1 20.6 TLV2322IDR SOIC D 8 2500 367.0 367.0 35.0 TLV2322IPWR TSSOP PW 8 2000 367.0 367.0 35.0 TLV2324IDR SOIC D 14 2500 367.0 367.0 38.0 TLV2324IPWR TSSOP PW 14 2000 367.0 367.0 35.
PAGE 33
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.