Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLinear ICsLinear IC - Comparator Differential CMOS, MOS, Open drain, TTL TSSOP 8

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

TLV2352, TLV2352Y

LinCMOS DUAL LOW-VOLTAGE DIFFERENTIAL COMPARATORS

SLCS011B – MAY 1992 – REVISED MARCH 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Wide Range of Supply Voltages

2 V to 8 V

Fully Characterized at 3 V and 5 V

Very-Low Supply-Current Drain

120 µA Typ at 3 V

Output Compatible With TTL, MOS, and

CMOS

Fast Response Time . . . 200 ns Typ for

TTL-Level Input Step

High Input Impedance ...10

Ω Typ

Extremely Low Input Bias Current

5 pA Typ

Common-Mode Input Voltage Range

Includes Ground

Built-In ESD Protection

description

The TLV2352 consists of two independent,

low-power comparators specifically designed for

single power-supply applications and operates

with power-supply rails as low as 2 V. When

powered from a 3-V supply, the typical supply

current is only 120 µA.

The TLV2352 is designed using the Texas Instruments LinCMOS technology and therefore features an

extremely high input impedance (typically greater than 10

Ω), which allows direct interfacing with

high-impedance sources. The outputs are N-channel open-drain configurations that require an external pullup

resistor to provide a positive output voltage swing, and they can be connected to achieve positive-logic

wired-AND relationships. The TLV2352I is fully characterized at 3 V and 5 V for operation from – 40°C to 85°C.

The TLV2352M is fully characterized at 3 V and 5 V for operation from – 55°C to 125°C.

The TLV2352 has internal electrostatic-discharge (ESD)-protection circuits and has been classified with a

1000-V ESD rating using Human Body Model testing. However, care should be exercised in handling this device

as exposure to ESD may result in degradation of the device parametric performance.

AVAILABLE OPTIONS

PACKAGED DEVICES

CHIP

max

at 25°C

SMALL

OUTLINE

(D)

†

CHIP

CARRIER

(FK)

CERAMIC

DIP

(JG)

PLASTIC

DIP

(P)

TSSOP

(PW)

‡

PLASTIC

DIP

(U)

CHIP

FORM

(Y)

–40°C to

85°C

5 mV TLV2352ID — — TLV2352IP TLV2352IPWLE —

TLV2352Y

–55°C to

125°C

5 mV — TLV2352MFK TLV2352MJG — — TLV2352MU

TLV2352Y

†

The D package is available taped and reeled. Add the suffix R to the device type (e.g., TLV2352IDR).

‡

The PW packages are only available left-ended taped and reeled (e.g., TLV2352IPWLE)

These devices have limited built-in protection. The leads should be shorted together or the device placed in conductive foam during

storage or handling to prevent electrostatic damage to the MOS gates.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

LinCMOS is a trademark of Texas Instruments Incorporated.

OUT

IN+

IN–

symbol (each comparator)

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.

Summary of content (25 pages)

PAGE 1
TLV2352, TLV2352Y LinCMOS DUAL LOW-VOLTAGE DIFFERENTIAL COMPARATORS SLCS011B – MAY 1992 – REVISED MARCH 1999 D D D D D D D Wide Range of Supply Voltages 2 V to 8 V Fully Characterized at 3 V and 5 V Very-Low Supply-Current Drain 120 µA Typ at 3 V Output Compatible With TTL, MOS, and CMOS Fast Response Time . . . 200 ns Typ for TTL-Level Input Step D D High Input Impedance . . .
PAGE 2
TLV2352, TLV2352Y LinCMOS DUAL LOW-VOLTAGE DIFFERENTIAL COMPARATORS SLCS011B – MAY 1992 – REVISED MARCH 1999 TLV2352I . . . D OR P PACKAGE TLV2352M . . . JG PACKAGE (TOP VIEW) 1OUT 1IN – 1IN + VDD– /GND 1 8 2 7 3 6 4 5 VDD+ 2OUT 2IN – 2IN + TLV2254M U PACKAGE (TOP VIEW) NC 1OUT 1IN – 1IN + VDD – /GND •1 10 2 9 3 8 4 7 5 6 TLV2352I . . .
PAGE 3
TLV2352, TLV2352Y LinCMOS DUAL LOW-VOLTAGE DIFFERENTIAL COMPARATORS GND Common to All Channels VDD equivalent schematic IN + IN – OUT SLCS011B – MAY 1992 – REVISED MARCH 1999 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3
PAGE 4
TLV2352, TLV2352Y LinCMOS DUAL LOW-VOLTAGE DIFFERENTIAL COMPARATORS SLCS011B – MAY 1992 – REVISED MARCH 1999 TLV2352Y chip information These chips, when properly assembled, display characteristics similar to the TLV2352. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. This chip can be mounted with conductive epoxy or a gold-silicon preform.
PAGE 5
TLV2352, TLV2352Y LinCMOS DUAL LOW-VOLTAGE DIFFERENTIAL COMPARATORS SLCS011B – MAY 1992 – REVISED MARCH 1999 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 6
TLV2352, TLV2352Y LinCMOS DUAL LOW-VOLTAGE DIFFERENTIAL COMPARATORS SLCS011B – MAY 1992 – REVISED MARCH 1999 electrical characteristics at specified free-air temperature† TLV2352I PARAMETER TA‡ TEST CONDITIONS VIO Input offset voltage VIC = VICRmin min, IIO Input offset current IIB Input bias current VICR Common-mode Common mode input voltage range IOH High-level g output current VID = 1 V VOL Low-level output voltage VID = – 1 V, V IOL = 2 mA IOL Low-level output current VID = – 1 V,
PAGE 7
TLV2352, TLV2352Y LinCMOS DUAL LOW-VOLTAGE DIFFERENTIAL COMPARATORS SLCS011B – MAY 1992 – REVISED MARCH 1999 electrical characteristics at specified free-air temperature† TLV2352M PARAMETER VIO Input offset voltage IIO Input offset current IIB Input bias current TA‡ TEST CONDITIONS VIC = VICRmin min, VDD = 3 V MIN TYP MAX 25°C See Note 4 1 Full range 25°C High-level g output current VID = 1 V VOL Low-level output voltage VID = – 1 V V, IOL = 2 mA IOL Low-level output current VID = –
PAGE 8
TLV2352, TLV2352Y LinCMOS DUAL LOW-VOLTAGE DIFFERENTIAL COMPARATORS SLCS011B – MAY 1992 – REVISED MARCH 1999 electrical characteristics at specified free-air temperature, TA = 25°C† TLV2352Y PARAMETER TEST CONDITIONS VIC = VICRmin, VDD = 3 V MIN TYP MAX See Note 4 Input offset voltage Input offset current 1 1 pA IIB VICR Input bias current 5 5 pA IOH VOL High-level output current Low-level output voltage 5 0 to 2 VID = 1 V VID = – 1 V, 5 0 to 4 0.1 IOL = 2 mA VOL = 1.
PAGE 9
TLV2352, TLV2352Y LinCMOS DUAL LOW-VOLTAGE DIFFERENTIAL COMPARATORS SLCS011B – MAY 1992 – REVISED MARCH 1999 TYPICAL CHARACTERISTICS LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT SUPPLY CURRENT vs FREE-AIR TEMPERATURE 190 VDD = 3 V TA = 25°C 990 No Load 180 880 170 I DD – Supply Current – µ A VOL – Low-Level Output Voltage – mV 1100 770 660 550 440 330 220 110 160 VDD = 5 V 150 140 VDD = 3 V 130 120 110 100 0 0 14 2 4 6 8 10 12 IOL – Low-Level Output Current – mA 90 –75 16 – 50 – 25
PAGE 10
TLV2352, TLV2352Y LinCMOS DUAL LOW-VOLTAGE DIFFERENTIAL COMPARATORS SLCS011B – MAY 1992 – REVISED MARCH 1999 TYPICAL CHARACTERISTICS HIGH-TO-LOW-LEVEL OUTPUT PROPAGATION DELAY FOR VARIOUS OVERDRIVE VOLTAGES HIGH-TO-LOW-LEVEL OUTPUT PROPAGATION DELAY FOR VARIOUS CAPACITIVE LOADS VDD = 3 V Overdrive = 10 mV RL = 5.1 kΩ (pullup to VDD) TA = 25°C VO – Output Voltage – V VO – Output Voltage – V VDD = 3 V CL = 15 pF RL = 5.
PAGE 11
TLV2352, TLV2352Y LinCMOS DUAL LOW-VOLTAGE DIFFERENTIAL COMPARATORS SLCS011B – MAY 1992 – REVISED MARCH 1999 PARAMETER MEASUREMENT INFORMATION The digital output stage of the TLV2352 can be damaged if it is held in the linear region of the transfer curve. Conventional operational amplifier/comparator testing incorporates the use of a servo loop that is designed to force the device output to a level within this linear region.
PAGE 12
TLV2352, TLV2352Y LinCMOS DUAL LOW-VOLTAGE DIFFERENTIAL COMPARATORS SLCS011B – MAY 1992 – REVISED MARCH 1999 PARAMETER MEASUREMENT INFORMATION Figure 10 illustrates a practical circuit for direct dc measurement of input offset voltage that does not bias the comparator in the linear region. The circuit consists of a switching-mode servo loop in which U1a generates a triangular waveform of approximately 20-mV amplitude. U1b acts as a buffer with C2 and R4 removing any residual dc offset.
PAGE 13
TLV2352, TLV2352Y LinCMOS DUAL LOW-VOLTAGE DIFFERENTIAL COMPARATORS SLCS011B – MAY 1992 – REVISED MARCH 1999 PARAMETER MEASUREMENT INFORMATION Propagation delay time is defined as the interval between the application of an input step function and the instant when the output crosses VO = 1 V with VDD = 3 V or when the output crosses VO = 1.4 V with VDD = 5 V.
PAGE 14
TLV2352, TLV2352Y LinCMOS DUAL LOW-VOLTAGE DIFFERENTIAL COMPARATORS SLCS011B – MAY 1992 – REVISED MARCH 1999 MECHANICAL INFORMATION D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PIN SHOWN PINS ** 0.050 (1,27) 8 14 16 A MAX 0.197 (5,00) 0.344 (8,75) 0.394 (10,00) A MIN 0.189 (4,80) 0.337 (8,55) 0.386 (9,80) DIM 0.020 (0,51) 0.014 (0,35) 14 0.010 (0,25) M 8 0.244 (6,20) 0.228 (5,80) 0.008 (0,20) NOM 0.157 (4,00) 0.150 (3,81) 1 Gage Plane 7 A 0.010 (0,25) 0°– 8° 0.044 (1,12) 0.
PAGE 15
TLV2352, TLV2352Y LinCMOS DUAL LOW-VOLTAGE DIFFERENTIAL COMPARATORS SLCS011B – MAY 1992 – REVISED MARCH 1999 MECHANICAL INFORMATION FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 28 TERMINAL SHOWN 18 17 16 15 14 13 NO. OF TERMINALS ** 12 19 11 20 10 A B MIN MAX MIN MAX 20 0.342 (8,69) 0.358 (9,09) 0.307 (7,80) 0.358 (9,09) 28 0.442 (11,23) 0.458 (11,63) 0.406 (10,31) 0.458 (11,63) 21 9 22 8 44 0.640 (16,26) 0.660 (16,76) 0.495 (12,58) 0.560 (14,22) 23 7 52 0.
PAGE 16
TLV2352, TLV2352Y LinCMOS DUAL LOW-VOLTAGE DIFFERENTIAL COMPARATORS SLCS011B – MAY 1992 – REVISED MARCH 1999 MECHANICAL INFORMATION JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE PACKAGE 0.400 (10,20) 0.355 (9,00) 8 5 0.280 (7,11) 0.245 (6,22) 1 4 0.065 (1,65) 0.045 (1,14) 0.310 (7,87) 0.290 (7,37) 0.020 (0,51) MIN 0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN 0.063 (1,60) 0.015 (0,38) 0°–15° 0.023 (0,58) 0.015 (0,38) 0.015 (0,38) 0.008 (0,20) 0.100 (2,54) 4040107 / B 04/95 NOTES: A. B. C. D. E.
PAGE 17
TLV2352, TLV2352Y LinCMOS DUAL LOW-VOLTAGE DIFFERENTIAL COMPARATORS SLCS011B – MAY 1992 – REVISED MARCH 1999 MECHANICAL INFORMATION P (R-PDIP-T8) PLASTIC DUAL-IN-LINE PACKAGE 0.400 (10,60) 0.355 (9,02) 8 5 0.260 (6,60) 0.240 (6,10) 1 4 0.070 (1,78) MAX 0.310 (7,87) 0.290 (7,37) 0.020 (0,51) MIN 0.200 (5,08) MAX Seating Plane 0.125 (3,18) MIN 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0°– 15° 0.010 (0,25) M 0.010 (0,25) NOM 4040082 / B 03/95 NOTES: A.
PAGE 18
TLV2352, TLV2352Y LinCMOS DUAL LOW-VOLTAGE DIFFERENTIAL COMPARATORS SLCS011B – MAY 1992 – REVISED MARCH 1999 MECHANICAL INFORMATION PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PIN SHOWN 0,32 0,19 0,65 14 0,13 M 8 0,15 NOM 4,50 4,30 6,70 6,10 Gage Plane 0,25 1 7 0°– 8° 0,75 0,50 A Seating Plane 1,20 MAX 0,10 0,10 MIN PINS ** 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064 / D 10/95 NOTES: A. B. C. D.
PAGE 19
TLV2352, TLV2352Y LinCMOS DUAL LOW-VOLTAGE DIFFERENTIAL COMPARATORS SLCS011B – MAY 1992 – REVISED MARCH 1999 MECHANICAL INFORMATION U (S-GDFP-F10) CERAMIC DUAL FLATPACK 0.250 (6,35) 0.246 (6,10) 0.006 (0,15) 0.004 (0,10) 0.080 (2,03) 0.050 (1,27) 0.045 (1,14) 0.026 (0,66) 0.300 (7,62) 0.350 (8,89) 0.250 (6,35) 1 0.350 (8,89) 0.250 (6,35) 10 0.019 (0,48) 0.015 (0,38) 0.050 (1,27) 0.250 (6,35) 5 6 0.025 (0,64) 0.005 (0,13) 1.000 (25,40) 0.750 (19,05) 4040179 / B 03/95 NOTES: A. B. C. D. E.
PAGE 20
PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
PAGE 23
PACKAGE MATERIALS INFORMATION www.ti.com 8-Jul-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TLV2352IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2352IPWR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.
PAGE 24
PACKAGE MATERIALS INFORMATION www.ti.com 8-Jul-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TLV2352IDR SOIC D 8 2500 340.5 338.1 20.6 TLV2352IPWR TSSOP PW 8 2000 367.0 367.0 35.
PAGE 25
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