Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLinear ICsLinear IC - Op-amp Multi-purpose SOT 23 5

 

  

    

SLOS197A − AUGUST1997 − REVISED MARCH 2001

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Output Swing Includes Both Supply Rails

D Low Noise . . . 19 nV/√Hz Typ at f = 1 kHz

D Low Input Bias Current ...1 pA Typ

D Fully Specified for Single-Supply 3-V and

5-V Operation

D Very Low Power ...110 µA Typ

D Common-Mode Input Voltage Range

Includes Negative Rail

D Wide Supply Voltage Range

2.7 V to 10 V

D Macromodel Included

description

The TLV2721 is a single low-voltage operational amplifier available in the SOT-23 package. It offers a

compromise between the ac performance and output drive of the TLV2731 and the micropower TLV2711.

It consumes only 150 µA (max) of supply current and is ideal for battery-powered applications. The device

exhibits rail-to-rail output performance for increased dynamic range in single- or split-supply applications. The

TLV2721 is fully characterized at 3 V and 5 V and is optimized for low-voltage applications.

The TLV2721, exhibiting high input impedance and low noise, is excellent for small-signal conditioning for

high-impedance sources, such as piezoelectric transducers. Because of the micropower dissipation levels

combined with 3-V operation, these devices work well in hand-held monitoring and remote-sensing

applications. In addition, the rail-to-rail output feature with single or split supplies makes this family a great

choice when interfacing with analog-to-digital converters (ADCs).

With a total area of 5.6mm

, the SOT-23 package only requires one third the board space of the standard 8-pin

SOIC package. This ultra-small package allows designers to place single amplifiers very close to the signal

source, minimizing noise pick-up from long PCB traces.

AVAILABLE OPTIONS

max AT 25°C

PACKAGED DEVICES

SYMBOL

CHIP

FORM

‡

max AT 25

SOT-23 (DBV)

†

SYMBOL

FORM

‡

(Y)

0°C to 70°C 3 mV TLV2721CDBV VAKC

TLV2721Y

−40°C to 85°C 3 mV TLV2721IDBV VAKI

TLV2721Y

†

The DBV package available in tape and reel only.

‡

Chip forms are tested at T

= 25°C only.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications o

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

DBV PACKAGE

(TOP VIEW)

IN+

DD+

OUT V

DD−

/GND

IN−

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Advanced LinCMOS is a trademark of Texas Instruments.

Summary of content (28 pages)

PAGE 1
 SLOS197A − AUGUST1997 − REVISED MARCH 2001 D D D D D D D D DBV PACKAGE (TOP VIEW) Output Swing Includes Both Supply Rails Low Noise . . . 19 nV/√Hz Typ at f = 1 kHz Low Input Bias Current . . . 1 pA Typ Fully Specified for Single-Supply 3-V and 5-V Operation Very Low Power . . . 110 µA Typ Common-Mode Input Voltage Range Includes Negative Rail Wide Supply Voltage Range 2.
PAGE 2
 SLOS197A − AUGUST1997 − REVISED MARCH 2001 TLV2721Y chip information This chip, when properly assembled, displays characteristics similar to the TLV2721C. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. This chip may be mounted with conductive epoxy or a gold-silicon preform.
PAGE 3
 SLOS197A − AUGUST1997 − REVISED MARCH 2001 equivalent schematic VDD + Q3 Q6 Q9 R7 IN + Q12 Q14 Q16 C2 R6 OUT C1 IN − R5 Q1 Q4 Q13 Q15 R2 Q2 Q5 R3 R4 Q7 Q8 Q10 Q17 D1 Q11 R1 VDD −/ GND COMPONENT COUNT† Transistors Diodes Resistors Capacitors 23 5 11 2 † Includes both amplifiers and all ESD, bias, and trim circuitry POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3
PAGE 4
 SLOS197A − AUGUST1997 − REVISED MARCH 2001 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 V Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 5
 SLOS197A − AUGUST1997 − REVISED MARCH 2001 electrical characteristics at specified free-air temperature, VDD = 3 V (unless otherwise noted) PARAMETER VIO Input offset voltage αVIO Temperature coefficient of input offset voltage Input offset voltage long-term drift (see Note 4) IIO Input offset current IIB Input bias current VICR Common-mode input voltage range TA† TEST CONDITIONS TLV2721C MIN Full range VDD
PAGE 6
 SLOS197A − AUGUST1997 − REVISED MARCH 2001 operating characteristics at specified free-air temperature, VDD = 3 V PARAMETER TEST CONDITIONS RL = 2 kΩ‡, TLV2721C TA† MIN TYP 25°C 0.1 0.25 Full range 0.05 TLV2721I MAX MIN TYP 0.1 0.25 SR Slew rate at unity gain VO = 1.1 V to 1.
PAGE 7
 SLOS197A − AUGUST1997 − REVISED MARCH 2001 electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER VIO Input offset voltage αVIO Temperature coefficient of input offset voltage Input offset voltage long-term drift (see Note 4) TA† TEST CONDITIONS TLV2721C MIN Full range VDD ± = ± 2.5 V, VO = 0, VIC = 0, RS = 50 Ω TLV2721I TYP MAX 0.5 3 MIN TYP MAX 0.
PAGE 8
 SLOS197A − AUGUST1997 − REVISED MARCH 2001 operating characteristics at specified free-air temperature, VDD = 5 V PARAMETER TEST CONDITIONS RL = 2 kΩ‡, TLV2721C TA† MIN TYP 25°C 0.1 0.25 Full range 0.05 TLV2721I MAX MIN TYP 0.1 0.25 SR Slew rate at unity gain VO = 1.5 V to 3.
PAGE 9
 SLOS197A − AUGUST1997 − REVISED MARCH 2001 electrical characteristics at VDD = 3 V, TA = 25°C (unless otherwise noted) PARAMETER VIO IIO Input offset voltage IIB Input bias current VICR VOH TLV2721Y TEST CONDITIONS VIC = 0, Common-mode input voltage range | VIO| ≤ 5 mV, RS = 50 Ω High-level output voltage IOH = − 100 µA VIC = 1.
PAGE 10
 SLOS197A − AUGUST1997 − REVISED MARCH 2001 TYPICAL CHARACTERISTICS Table of Graphs FIGURE VIO Input offset voltage Distribution vs Common-mode input voltage 1, 2 3, 4 αVIO IIB/IIO Input offset voltage temperature coefficient Distribution 5, 6 Input bias and input offset currents vs Free-air temperature 7 VI Input voltage vs Supply voltage vs Free-air temperature 8 9 VOH VOL High-level output voltage vs
PAGE 11
 SLOS197A − AUGUST1997 − REVISED MARCH 2001 TYPICAL CHARACTERISTICS DISTRIBUTION OF TLV2721 INPUT OFFSET VOLTAGE DISTRIBUTION OF TLV2721 INPUT OFFSET VOLTAGE 25 20 18 Precentage of Amplifiers − % 16 Precentage of Amplifiers − % 545 Amplifiers From 1 Wafer Lot VDD = ± 1.5 V TA = 25°C 14 12 10 8 6 4 545 Amplifiers From 1 Wafer Lot VDD = ± 2.5 V TA = 25°C 20 15 10 5 2 0 0 −1.5 −1.1 −0.7 −0.3 0.1 0.5 0.
PAGE 12
 SLOS197A − AUGUST1997 − REVISED MARCH 2001 TYPICAL CHARACTERISTICS DISTRIBUTION OF TLV2721 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT† DISTRIBUTION OF TLV2721 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT† 25 32 Amplifiers From 1 Wafer Lot VDD = ± 1.
PAGE 13
 SLOS197A − AUGUST1997 − REVISED MARCH 2001 TYPICAL CHARACTERISTICS INPUT VOLTAGE†‡ vs FREE-AIR TEMPERATURE HIGH-LEVEL OUTPUT VOLTAGE†‡ vs HIGH-LEVEL OUTPUT CURRENT 3 5 VDD = 3 V VDD = 5 V 2.5 VOH − High-Level Output Voltage − V 4 VI − Input Voltage − V 3 |VIO| ≤ 5 mV 2 ÁÁ 1 0 −1 −55 −35 −15 5 25 45 65 85 105 TA − Free-Air Temperature − °C 125 TA = − 40°C 2 TA = 25°C 1.
PAGE 14
 SLOS197A − AUGUST1997 − REVISED MARCH 2001 TYPICAL CHARACTERISTICS LOW-LEVEL OUTPUT VOLTAGE†‡ vs LOW-LEVEL OUTPUT CURRENT HIGH-LEVEL OUTPUT VOLTAGE†‡ vs HIGH-LEVEL OUTPUT CURRENT 1.4 5 ÁÁ ÁÁ 4 TA = − 40°C TA = 25°C 3 TA = 85°C 2 TA = 125°C ÁÁ ÁÁ 1 0 0 1 2 3 4 5 6 7 VDD = 5 V VIC = 2.5 V 1.2 VOL − Low-Level Output Voltage − V VOH − High-Level Output Voltage − V VDD = 5 V VIC = 2.
PAGE 15
 SLOS197A − AUGUST1997 − REVISED MARCH 2001 TYPICAL CHARACTERISTICS SHORT-CIRCUIT OUTPUT CURRENT †‡ vs FREE-AIR TEMPERATURE OUTPUT VOLTAGE‡ vs DIFFERENTIAL INPUT VOLTAGE 3 VDD = 5 V VIC = 2.5 V VO = 2.5 V 16 12 VID = − 100 mV 8 4 0 VID = 100 mV 2 1.5 1 0.5 −4 −8 −75 VDD = 3 V RI = 2 kΩ VIC = 1.5 V TA = 25°C 2.
PAGE 16
 SLOS197A − AUGUST1997 − REVISED MARCH 2001 TYPICAL CHARACTERISTICS LARGE-SIGNAL DIFFERENTIAL VOLTAGE† AMPLIFICATION AND PHASE MARGIN vs FREQUENCY ÁÁ ÁÁ 60 180° VDD = 5 V RL = 2 kΩ CL= 100 pF TA = 25°C 135° 90° 40 Phase Margin 45° 20 Gain 0 0° φom m − Phase Margin AVD A VD − Large-Signal Differential Voltage Amplification − dB 80 −45° −20 −40 104 105 106 f − Frequency − Hz −90° 107 Figure 21 LARGE-SIGN
PAGE 17
 SLOS197A − AUGUST1997 − REVISED MARCH 2001 TYPICAL CHARACTERISTICS LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION†‡ vs FREE-AIR TEMPERATURE LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION†‡ vs FREE-AIR TEMPERATURE 10 4 VDD = 3 V VIC = 1.5 V VO = 0.5 V to 2.
PAGE 18
 SLOS197A − AUGUST1997 − REVISED MARCH 2001 TYPICAL CHARACTERISTICS COMMON-MODE REJECTION RATIO†‡ vs FREE-AIR TEMPERATURE COMMON-MODE REJECTION RATIO† vs FREQUENCY 88 CMMR − Common-Mode Rejection Ratio − dB CMRR − Common-Mode Rejection Ratio − dB 100 TA = 25°C VDD = 5 V VIC = 2.5 V 80 VDD = 3 V 60 VIC = 1.
PAGE 19
 SLOS197A − AUGUST1997 − REVISED MARCH 2001 TYPICAL CHARACTERISTICS SUPPLY CURRENT † vs SUPPLY VOLTAGE SUPPLY-VOLTAGE REJECTION RATIO† vs FREE-AIR TEMPERATURE 200 VDD = 2.
PAGE 20
 SLOS197A − AUGUST1997 − REVISED MARCH 2001 TYPICAL CHARACTERISTICS INVERTING LARGE-SIGNAL PULSE RESPONSE† INVERTING LARGE-SIGNAL PULSE RESPONSE† 5 3 VDD = 3 V RL = 2 kΩ CL = 100 pF AV = −1 TA = 25°C 4 VO − Output Voltage − V VO − Output Voltage − V 2.5 VDD = 5 V RL = 2 kΩ CL = 100 pF AV = − 1 TA = 25°C 2 1.5 1 3 2 1 0.
PAGE 21
 SLOS197A − AUGUST1997 − REVISED MARCH 2001 TYPICAL CHARACTERISTICS INVERTING SMALL-SIGNAL PULSE RESPONSE† INVERTING SMALL-SIGNAL PULSE RESPONSE† 0.82 2.58 VDD = 3 V RL = 2 kΩ CL = 100 pF AV = − 1 TA = 25°C 2.56 VO VO − Output Voltage − V VO − Output Voltage − V 0.8 VDD = 5 V RL = 2 kΩ CL = 100 pF AV = − 1 TA = 25°C 0.78 0.76 0.74 0.72 2.54 2.52 2.5 2.48 2.46 0.7 0 2.44 0.5 1 1.5 2 2.5 3 3.5 4 4.
PAGE 22
 SLOS197A − AUGUST1997 − REVISED MARCH 2001 TYPICAL CHARACTERISTICS EQUIVALENT INPUT NOISE VOLTAGE† vs FREQUENCY EQUIVALENT INPUT NOISE VOLTAGE† vs FREQUENCY 120 V n − Equivalent Input Noise Voltage − nV/ Hz V n − Equivalent Input Noise Voltage − nV/ Hz 120 VDD = 3 V RS = 20 Ω TA = 25°C 100 80 60 40 20 0 10 1 10 2 10 3 VDD = 5 V RS = 20 Ω TA = 25°C 100 80 60 40 20 0 101 10 4 10 2 f − Frequency − Hz
PAGE 23
 SLOS197A − AUGUST1997 − REVISED MARCH 2001 TYPICAL CHARACTERISTICS GAIN-BANDWIDTH PRODUCT †‡ vs FREE-AIR TEMPERATURE GAIN-BANDWIDTH PRODUCT vs SUPPLY VOLTAGE 600 VDD = 5 V f = 10 kHz RL = 2 kHz CL = 100 pF 700 RL = 2k CL = 100 pF TA = 25°C 575 Gain-Bandwidth Product − kHz Gain-Bandwidth Product − kHz 800 600 500 400 300 550 525 500 475 450 425 200 −75 −50 −25 0 25 50 75 100 TA − Free-Air Temperature − °C
PAGE 24
 SLOS197A − AUGUST1997 − REVISED MARCH 2001 TYPICAL CHARACTERISTICS PHASE MARGIN vs LOAD CAPACITANCE PHASE MARGIN vs LOAD CAPACITANCE 75° 75° TA = 25°C RL = ∞ TA = 25°C RL = 2 kΩ Rnull = 500 Ω Rnull = 1 kΩ 60° φom m − Phase Margin φom m − Phase Margin 60° 45° 30° Rnull = 1 kΩ 45° Rnull = 500 Ω 30° Rnull = 0 Rnull = 0 Rnull = 200 Ω 15° 15° Rnull = 100 Ω 0° 101 10 2 10 3 10 4 CL − Load Capacitance − pF
PAGE 25
 SLOS197A − AUGUST1997 − REVISED MARCH 2001 APPLICATION INFORMATION driving large capacitive loads The TLV2721 is designed to drive larger capacitive loads than most CMOS operational amplifiers. Figure 49 through Figure 54 illustrate its ability to drive loads greater than 100 pF while maintaining good gain and phase margins (Rnull = 0).
PAGE 26
 SLOS197A − AUGUST1997 − REVISED MARCH 2001 APPLICATION INFORMATION macromodel information Macromodel information provided was derived using Microsim Parts, the model generation software used with Microsim PSpice. The Boyle macromodel (see Note 6) and subcircuit in Figure 56 are generated using the TLV2721 typical electrical and operating characteristics at TA = 25°C.
PAGE 27
1 MPDS018D − FEBRUARY 1996 − REVISED JANUARY 2001 MECHANICAL INFORMATION DBV (R-PDSO-G5) PLASTIC SMALL-OUTLINE 0,50 0,30 0,95 5 0,20 M 4 1,70 1,50 1 0,15 NOM 3,00 2,60 3 Gage Plane 3,00 2,80 0,25 0°−8° 0,55 0,35 Seating Plane 1,45 0,95 0,05 MIN 0,10 4073253-4/F 10/00 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion.
PAGE 28
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.