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 

     

   

SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004

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D High Slew Rate . . . 10.5 V/µs Typ

D High-Gain Bandwidth . . . 5.1 MHz Typ

D Supply Voltage Range 2.5 V to 5.5 V

D Rail-to-Rail Output

D 360 µV Input Offset Voltage

D Low Distortion Driving 600-Ω

0.005% THD+N

D 1 mA Supply Current (Per Channel)

D 17 nV/√Hz Input Noise Voltage

D 2 pA Input Bias Current

D Characterized From T

= −55°C to 125°C

D Available in MSOP and SOT-23 Packages

D Micropower Shutdown Mode ...I

< 1 µA

D Available in Q-Temp Automotive

High Reliability Automotive Applications

Configuration Control / Print Support

Qualification to Automotive Standards

description

The TLV277x CMOS operational amplifier family combines high slew rate and bandwidth, rail-to-rail output

swing, high output drive, and excellent dc precision. The device provides 10.5 V/µs of slew rate and 5.1 MHz

of bandwidth while only consuming 1 mA of supply current per channel. This ac performance is much higher

than current competitive CMOS amplifiers. The rail-to-rail output swing and high output drive make these

devices a good choice for driving the analog input or reference of analog-to-digital converters. These devices

also have low distortion while driving a 600-Ω load for use in telecom systems.

These amplifiers have a 360-µV input offset voltage, a 17 nV/√Hz

input noise voltage, and a 2-pA input bias

current for measurement, medical, and industrial applications. The TLV277x family is also specified across an

extended temperature range (−40°C to 125°C), making it useful for automotive systems, and the military

temperature range (−55°C to 125°C), for military systems.

These devices operate from a 2.5-V to 5.5-V single supply voltage and are characterized at 2.7 V and 5 V. The

single-supply operation and low power consumption make these devices a good solution for portable

applications. The following table lists the packages available.

FAMILY PACKAGE TABLE

DEVICE

NUMBER

PACKAGE TYPES

SHUTDOWN

UNIVERSAL

DEVICE

CHANNELS

PDIP CDIP SOIC SOT-23 TSSOP MSOP LCCC CPAK

SHUTDOWN

UNIVERSAL

EVM BOARD

TLV2770 1 8 — 8 — — 8 — — Yes

TLV2771 1 — — 8 5 — — — — —

Refer to the EVM

TLV2772 2 8 8 8 — 8 8 20 10 —

Refer to the EVM

Selection Guide

TLV2773 2 14 — 14 — — 10 — — Yes

Selection Guide

(Lit# SLOU060)

TLV2774 4 14 — 14 — 14 — — — —

(Lit# SLOU060)

TLV2775 4 16 — 16 — 16 — — — Yes

A SELECTION OF SINGLE-SUPPLY OPERATIONAL AMPLIFIER PRODUCTS

†

DEVICE

(V)

(MHz)

SLEW RATE

(V/µs)

(per channel)

(µA)

RAIL-TO-RAIL

TLV277X 2.5 − 6.0 5.1 10.5 1000 O

TLV247X 2.7 − 6.0 2.8 1.5 600 I/O

TLV245X 2.7 − 6.0 0.22 0.11 23 I/O

TLV246X 2.7 − 6.0 6.4 1.6 550 I/O

†

All specifications measured at 5 V.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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Summary of content (75 pages)

PAGE 1
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 D D D D D D D D D D D D D High Slew Rate . . . 10.5 V/µs Typ High-Gain Bandwidth . . . 5.1 MHz Typ Supply Voltage Range 2.5 V to 5.5 V Rail-to-Rail Output 360 µV Input Offset Voltage Low Distortion Driving 600-Ω 0.
PAGE 2
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TLV2770 and TLV2771 AVAILABLE OPTIONS PACKAGED DEVICES TA VIOmax AT 25°C (mV) 0°C to 70°C 2.5 2.5 −40°C to 125°C SMALL OUTLINE (D) SOT-23 (DBV) MSOP (DGK) PLASTIC DIP (P) TLV2770CD TLV2771CD — TLV2771CDBV TLV2770CP — TLV2770ID TLV2771ID — TLV2771IDBV TLV2770CDGK† — TLV2770IDGK† — — — — — TLV2770AIP — TLV2770AID TLV2771AID 1.
PAGE 3
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 PACKAGE SYMBOLS PACKAGE TYPE PINS SOT23 5 Pin 8 Pin MSOP 10 Pin PART NUMBER SYMBOL† TLV2771CDBV VAMC TLV2771IDBV VAMI TLV2770CDGK xxTIABO TLV2770IDGK xxTIABP TLV2772CDGK xxTIAAF TLV2772IDGK xxTIAAG TLV2773CDGS xxTIABQ TLV2773IDGS xxTIABR † xx represents the device date code.
PAGE 4
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TLV277x PACKAGE PINOUTS(1) TLV2771 DBV PACKAGE (TOP VIEW) TLV2770 D, DGK† OR P PACKAGE (TOP VIEW) NC IN − IN + GND 1 8 2 7 3 6 4 5 SHDN VDD OUT NC TLV2772 D, DGK, JG, P, OR PW PACKAGE (TOP VIEW) 1OUT 1IN − 1IN + GND 1OUT 1IN − 1IN+ GND NC 1SHDN NC 1 8 2 7 3 6 4 5 VDD 2OUT 2IN − 2IN+ 1 OUT GND 2 IN+ 3 TLV2771 D PACKAGE (TOP VIEW) VDD 5
PAGE 5
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 6
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 electrical characteristics at specified free-air temperature, VDD = 2.7 V (unless otherwise noted) PARAMETER TEST CONDITIONS TLV2770/1/2 VIO Input offset voltage TLV2773/4/5 αVIO Temperature coefficient of input offset voltage IIO Input offset current IIB Input bias current VIC = 0, RS = 50 Ω, No load VO = 0, VDD = ±1.
PAGE 7
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 operating characteristics at specified free-air temperature, VDD = 2.7 V (unless otherwise noted) PARAMETER SR Slew rate at unity gain Vn Equivalent input noise voltage VN(PP) Peak-to-peak equivalent input noise voltage In Equivalent input noise current TEST CONDITIONS VO(PP) = 0.8 V, RL = 10 kΩ CL = 100 pF, MIN TYP 25°C 5 9 Full range 4.
PAGE 8
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TLV2770/1/2 VIO Input offset voltage TLV2773/4/5 αVIO Temperature coefficient of input offset voltage IIO Input offset current IIB Input bias current VIC = 0, RS = 50 Ω Ω, No load VIC = 0, RS = 50 Ω VO = 0, VDD = ±2.
PAGE 9
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 operating characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS VO(PP) = 2 V, RL = 10 kΩ SR Slew rate at unity gain Vn Equivalent input noise voltage VN(PP) Peak-to-peak equivalent input noise voltage In Equivalent input noise current CL = 100 pF, MIN TYP 25°C 5 10.5 Full range 4.
PAGE 10
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 electrical characteristics at specified free-air temperature, VDD = 2.7 V (unless otherwise noted) PARAMETER TLV2770/1/2 VIO Input offset voltage TLV2773/4/5 αVIO Temperature coefficient of input offset voltage IIO Input offset current IIB Input bias current VIC = 0, VO = 0, RS = 50 Ω VDD = ±1.35 1.35 V, No load VIC = 0, VO = 0, RS = 50 Ω IOH = − 0.
PAGE 11
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 electrical characteristics at specified free-air temperature, VDD = 2.7 V (unless otherwise noted) (continued) TEST CONDITIONS PARAMETER TLV277xI TA† MIN TLV2770 V(ON) V(OFF) Turnon voltage level Turnoff voltage level TLV2773 TYP TLV277xAI MAX MIN TYP 1.47 1.47 1.43 1.43 TLV2775 1.40 1.4 TLV2770 1.27 1.27 1.21 1.21 1.20 1.
PAGE 12
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) TEST CONDITIONS PARAMETER TLV2770/1/2 VIO Input offset voltage TLV2773/4/5 αVIO Temperature coefficient of input offset voltage IIO Input offset current IIB Input bias current VIC = 0, No load VO = 0, RS = 50 Ω,, VDD = ±2.5 2.
PAGE 13
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) (continued) TEST CONDITIONS PARAMETER TLV277xI TA† MIN TLV2770 V(ON) V(OFF) Turnon voltage level Turnoff voltage level TLV2773 TYP TLV277xAI MAX MIN TYP 2.59 2.59 2.47 2.47 TLV2775 2.48 2.48 TLV2770 2.41 2.41 2.32 2.32 2.29 2.
PAGE 14
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 electrical characteristics at specified free-air temperature, VDD = 2.7 V (unless otherwise noted) PARAMETER TA† TEST CONDITIONS TLV2772Q TLV2772M MIN VIO Input offset voltage αVIO Temperature coefficient of input offset voltage IIO Input offset current IIB Input bias current VICR Common-mode input voltage range VDD = ± 1.
PAGE 15
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 operating characteristics at specified free-air temperature, VDD = 2.7 V (unless otherwise noted) PARAMETER SR Slew rate at unity gain Vn Equivalent input noise voltage VN(PP) Peak-to-peak equivalent input noise voltage In THD + N VO(PP) = 0.8 V, RL = 10 kΩ CL = 100 pF, MIN TYP 25°C 5 Full range 4.
PAGE 16
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER TA† TEST CONDITIONS TLV2772Q TLV2772M MIN VIO Input offset voltage αVIO Temperature coefficient of input offset voltage IIO Input offset current IIB Input bias current VICR Common-mode input voltage range VDD = ± 2.
PAGE 17
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 operating characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER SR Slew rate at unity gain Vn Equivalent input noise voltage VN(PP) Peak-to-peak equivalent input noise voltage In THD + N VO(PP) = 1.5 V, RL = 10 kΩ CL = 100 pF, MIN TYP 25°C 5 Full range 4.7 φm TLV2772AQ TLV2772AM MAX MIN TYP 10.
PAGE 18
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS Table of Graphs FIGURE VIO Input offset voltage Distribution vs Common-mode input voltage Distribution IIB/IIO VOH Input bias and input offset currents vs Free-air temperature High-level output voltage vs High-level output current 8,9 VOL VO(PP) Low-level output voltage vs Low-level output current 10,11 Maximum peak-to-peak outp
PAGE 19
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS DISTRIBUTION OF TLV2772 INPUT OFFSET VOLTAGE DISTRIBUTION OF TLV2772 INPUT OFFSET VOLTAGE 40 40 VDD = 2.7 V RL = 10 kΩ TA = 25°C 35 Percentage of Amplifiers − % Percentage of Amplifiers − % 35 30 25 20 15 10 VDD = 5 V RL = 10 kΩ TA = 25°C 30 25 20 15 10 5 5 0 −2.5 −2 −1.5 −1 −0.5 0 0.5 1 1.5 2 0 2.5 −2.5 −2 −1.5 −1 −0.
PAGE 20
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS DISTRIBUTION OF TLV2772 INPUT OFFSET VOLTAGE DISTRIBUTION OF TLV2772 INPUT OFFSET VOLTAGE 35 35 VDD = 2.
PAGE 21
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 5 3 VDD = 5 V TA = 25°C 4 VDD = 2.7 V VOL − Low-Level Output Voltage − V VOH − High-Level Output Voltage − V 4.5 TA = −40°C 3.5 TA = 25°C 3 2.5 TA = 125°C 2 1.5 TA = 85°C 1 0.5 0 0 5 10 15 20 25 30 35 40 45 50 2.
PAGE 22
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS SHORT-CIRCUIT OUTPUT CURRENT vs SUPPLY VOLTAGE 5 60 THD = 5% RL = 600 Ω TA = 25°C 4.5 4 I OS − Short-Circuit Output Current − mA VO(PP) − Maximum Peak-to-Peak Output Voltage − V MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE vs FREQUENCY 3.5 VDD = 5 V 3 2.5 VDD = 2.7 V 2 1.5 1 0.
PAGE 23
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE MARGIN vs FREQUENCY VDD = 2.
PAGE 24
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS DIFFERENTIAL VOLTAGE AMPLIFICATION vs LOAD RESISTANCE DIFFERENTIAL VOLTAGE AMPLIFICATION vs FREE-AIR TEMPERATURE 1000 TA = 25°C A VD − Differential Voltage Amplification − V/mV A VD − Differential Voltage Amplification − V/mV 250 200 VDD = 2.7 V VDD = 5 V 150 100 50 0 0.
PAGE 25
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS OUTPUT IMPEDANCE vs FREQUENCY COMMON-MODE REJECTION RATIO vs FREQUENCY 100 90 CMRR − Common-Mode Rejection Ratio − dB Zo − Output Impedance − Ω VDD = ±2.5 V TA = 25°C 10 Av = 100 1 Av = 10 0.1 Av = 1 0.
PAGE 26
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS SUPPLY VOLTAGE REJECTION RATIO vs FREQUENCY SUPPLY CURRENT (PER CHANNEL) vs SUPPLY VOLTAGE 100 1.6 VDD = 5 V TA = 25°C kSVR+ I DD − Supply Current (Per Channel) − mA k SVR − Supply Voltage Rejection Ratio − dB 120 kSVR− 80 60 40 20 0 10 100 1k 10 k 100 k 1M TA = 125°C 1.4 1.2 TA = 25°C 1 TA = 0°C TA = − 40°C 0.8 0.6 0.
PAGE 27
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS VOLTAGE-FOLLOWER SMALL-SIGNAL PULSE RESPONSE VOLTAGE-FOLLOWER SMALL-SIGNAL PULSE RESPONSE 100 60 VDD = 5 V RL = 600 Ω CL = 100 pF AV = 1 TA = 25°C 80 VO − Output Voltage − mV 80 VO − Output Voltage − mV 100 VDD = 2.7 V RL = 600 Ω CL = 100 pF AV = 1 TA = 25°C 40 20 0 −20 −40 60 40 20 0 −20 −40 −60 0 0.5 1 1.5 2 2.5 3 3.
PAGE 28
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS INVERTING SMALL-SIGNAL PULSE RESPONSE INVERTING SMALL-SIGNAL PULSE RESPONSE 100 60 VDD = 5 V RL = 600 Ω CL = 100 pF AV = −1 TA = 25°C 80 VO − Output Voltage − mV 80 VO − Output Voltage − mV 100 VDD = 2.7 V RL = 600 Ω CL = 100 pF AV = −1 TA = 25°C 40 20 0 −20 −40 60 40 20 0 −20 −40 −60 0 0.5 1 1.5 2 2.5 3 3.5 4 4.
PAGE 29
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY 160 140 120 100 80 60 40 VDD = 5 V RS = 20 Ω TA = 25°C 120 100 80 60 40 20 20 0 10 1k 100 0 10k 10 100 f − Frequency − Hz 1k 10k f − Frequency − Hz Figure 39 Figure 40 NOISE VOLTAGE OVER A 10 SECOND PERIOD VDD = 5 V f = 0.
PAGE 30
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY 10 VDD = 2.7 V RL = 600 Ω TA = 25°C 1 Av = 100 0.1 Av = 10 0.01 Av = 1 0.001 10 10 THD+N − Total Harmonic Distortion Plus Noise − % THD+N − Total Harmonic Distortion Plus Noise − % TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY 100 1k 10k VDD = 5 V RL = 600 Ω TA = 25°C 1 0.
PAGE 31
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS PHASE MARGIN vs LOAD CAPACITANCE GAIN MARGIN vs LOAD CAPACITANCE 90 70 10 Rnull = 50 Ω 60 50 Rnull = 20 Ω 40 30 20 Rnull = 0 Rnull = 50 Ω 10k 40 10 100K 100 10k 1k CL − Load Capacitance − pF CL − Load Capacitance − pF Figure 46 Figure 47 TLV2770 TLV2773 AMPLIFIER WITH SHUTDOWN PULSE TURNON/OFF CHARACTERISTICS AMPLIFIER
PAGE 32
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS TLV2775 − CHANNEL 1 TLV2770 AMPLIFIER WITH SHUTDOWN PULSE TURNON/OFF CHARACTERISTICS SUPPLY CURRENT WITH SHUTDOWN PULSE TURNON/OFF CHARACTERISTICS 2 VDD = 5 V SHDN = GND AV = 5 TA = 25°C Channel 1/2 Switched Channel 3/4 SHDN MODE 0 −2 −10 −2.5 2 5 0 4 3 1 −6 −8 6 2 Channel 1 −4 4 VO 2.5 5 7.5 10 12.
PAGE 33
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS SHUTDOWN SUPPLY CURRENT vs FREE-AIR TEMPERATURE TLV2770 5 4 VDD 5 V 3 2 VDD 2.7 V 1 100 −50 −25 0 25 50 75 100 125 60 40 20 −20 10 TA − Free-Air Temperature − °C VI(PP) = 0.1 V 80 0 0 −75 VI(PP) = 2.7 V 120 Shutdown Forward Isolation − dB 6 140 AV = 5 RL = OPEN SHDN = GND SHDN MODE AV = 1 VDD = 2.
PAGE 34
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 PARAMETER MEASUREMENT INFORMATION _ Rnull + RL CL Figure 57 driving a capacitive load When the amplifier is configured in this manner, capacitive loading directly on the output will decrease the device’s phase margin leading to high frequency ringing or oscillations.
PAGE 35
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 APPLICATION INFORMATION offset voltage The output offset voltage, (VOO) is the sum of the input offset voltage (VIO) and both input bias currents (IIB) times the corresponding gains.
PAGE 36
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 APPLICATION INFORMATION using the TLV2772 as an accelerometer interface The schematic, shown in Figure 62, shows the ACH04-08-05 interfaced to the TLV1544 10-bit analog-to-digital converter (ADC). The ACH04-08-05 is a shock sensor designed to convert mechanical acceleration into electrical signals.
PAGE 37
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 APPLICATION INFORMATION gain calculation Since the TLV2772 is capable of rail-to-rail output using a 3-V supply, VO = 0 (min) to 3 V (max). With no signal from the sensor, nominal VO = reference voltage = 1.23 V. Therefore, the maximum negative swing from nominal is 0 V − 1.23 V = −1.23 V and the maximum positive swing is 3 V − 1.23 V = 1.77 V.
PAGE 38
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 APPLICATION INFORMATION circuit layout considerations To achieve the levels of high performance of the TLV277x, follow proper printed-circuit board design techniques. A general set of guidelines is given in the following.
PAGE 39
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 APPLICATION INFORMATION general power dissipation considerations For a given θJA, the maximum power dissipation is shown in Figure 63 and is calculated by the following formula: P D + Where: ǒ T Ǔ –T MAX A q JA PD = Maximum power dissipation of TLV277x IC (watts) TMAX = Absolute maximum junction temperature (150°C) TA = Free-ambient air temperature (°C) θJA
PAGE 40
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 APPLICATION INFORMATION shutdown function Three members of the TLV277x family (TLV2770/3/5) have a shutdown terminal for conserving battery life in portable applications. When the shutdown terminal is tied low, the supply current is reduced to 0.8 µA/channel, the amplifier is disabled, and the outputs are placed in a high impedance mode.
PAGE 41
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 APPLICATION INFORMATION macromodel information Macromodel information provided was derived using Microsim Parts Release 8, the model generation software used with Microsim PSpice . The Boyle macromodel (see Note 4) and subcircuit in Figure 64 are generated using the TLV2772 typical electrical and operating characteristics at TA = 25°C.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Mar-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TLV2770CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2770IDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TLV2770IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Mar-2013 Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TLV2772IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2772MDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2772MDRG4 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2773IDGSR VSSOP DGS 10 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Mar-2013 Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TLV2771CDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TLV2771CDBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TLV2771CDR SOIC D 8 2500 340.5 338.1 20.6 TLV2771IDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TLV2771IDBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TLV2771IDR SOIC D 8 2500 340.5 338.1 20.6 TLV2772AIDR SOIC D 8 2500 340.5 338.
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MECHANICAL DATA MCER001A – JANUARY 1995 – REVISED JANUARY 1997 JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE 0.400 (10,16) 0.355 (9,00) 8 5 0.280 (7,11) 0.245 (6,22) 1 0.063 (1,60) 0.015 (0,38) 4 0.065 (1,65) 0.045 (1,14) 0.310 (7,87) 0.290 (7,37) 0.020 (0,51) MIN 0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN 0.023 (0,58) 0.015 (0,38) 0°–15° 0.100 (2,54) 0.014 (0,36) 0.008 (0,20) 4040107/C 08/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters).
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.