Datasheet

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FEATURES APPLICATIONS
DESCRIPTION
TLV320ADC3101
www.ti.com ...................................................................................................................................... SLAS553A – NOVEMBER 2008 – REVISED SEPTEMBER 2009
Low Power Stereo ADC With Embedded miniDSP
for Wireless Handsets and Portable Audio
• Wireless Handsets
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• Stereo Audio ADC
• Portable Low-Power Audio Systems
– 92-dBA Signal-to-Noise Ratio
• Noise-Cancellation Systems
– Supports ADC Sample Rates From 8 kHz to
• Front-End Voice or Audio Processor for Digital
96 kHz
Audio
• Instruction-Programmable Embedded miniDSP
• Flexible Digital Filtering With RAM
Programmable Coefficient, Instructions, and
The TLV320ADC3101 is a low-power, stereo audio
Built-In Processing Blocks
analog-to-digital converter (ADC) supporting sampling
– Low-Latency IIR Filters for Voice
rates from 8 kHz to 96 kHz with an integrated
– Linear Phase FIR Filters for Audio
programmable-gain amplifier providing up to 40-dB
analog gain or AGC. A programmable miniDSP is
– Additional Programmable IIR Filters for EQ,
provided for custom audio processing. Front-end
Noise Cancellation or Reduction
input coarse attenuation of 0 dB, – 6 dB, or off, is also
– Up to 128 Programmable ADC Digital Filter
provided. The inputs are programmable in a
Coefficients
combination of single-ended or fully differential
• Six Audio Inputs With Configurable Automatic
configurations. Extensive register-based power
control is available via an I
2
C interface, enabling
Gain Control (AGC)
mono or stereo recording. Low power consumption
– Programmable in Single-Ended or Fully
makes the TLV320ADC3101 ideal for
Differential Configurations
battery-powered portable equipment.
– Can Be 3-Stated for Easy Interoperability
The AGC programs to a wide range of attack
With Other Audio ICs
(7 ms – 1.4 s) and decay (50 ms – 22.4 s) times. A
• Low Power Consumption and Extensive
programmable noise-gate function is included to
Modular Power Control:
avoid noise pumping. Low-latency IIR filters optimized
– 6-mW Mono Record, 8-kHz for voice and telephony are available, as well as
linear-phase FIR filters optimized for audio.
– 11-mW Stereo Record, 8-kHz
Programmable IIR filters are also available and may
– 10-mW Mono Record, 48-kHz
be used for sound equalization, or to remove noise
– 17-mW Stereo Record, 48-kHz
components. The audio serial bus can be
programmed to support I
2
S, left-justified,
• Dual Programmable Microphone Bias
right-justified, DSP, PCM, and TDM modes. The
• Programmable PLL for Clock Generation
audio bus may be operated in either master or slave
• I
2
C™ Control Bus
mode.
• Audio Serial Data Bus Supports I
2
S,
A programmable integrated PLL is included for
Left/Right-Justified, DSP, PCM, and TDM
flexible clock generation and provides support for all
Modes
standard audio rates from a wide range of available
MCLKs, varying from 512 kHz to 50 MHz, including
• Digital Microphone Input Support
the most popular cases of 12-MHz, 13-MHz, 16-MHz,
• Two GPIOs
19.2-MHz, and 19.68-MHz system clocks.
• Power Supplies:
– Analog: 2.6 V – 3.6 V
– Digital: Core: 1.65 V – 1.95 V,
I/O: 1.1 V – 3.6 V
• 4-mm × 4-mm 24-Pin RGE (QFN)
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2 I2C is a trademark of Phillips Electronics.
PRODUCTION DATA information is current as of publication date.
Copyright © 2008 – 2009, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.