TLV320AIC23 EVM2 Evaluation Platform for the TLV320AIC23 Stereo Audio CODEC and TLV320DAC23 Stereo DAC User’s Guide February 2002 DAV Digital Audio/Speaker SLEU016
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
EVM IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use.
EVM WARNINGS AND RESTRICTIONS It is important to operate this EVM within the input voltage range of 0–1.5 V and the output voltage range of 0 V and 3.6 V. Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions concerning the input range, please contact a TI field representative prior to connecting the input power.
Related Documentation From Texas Instruments Preface Read This First About This Manual This user’s guide describes the setup and operation of the TLV320AIC23 EVM2 evaluation platform, and installation and operation of the DASCCT_AIC23 software that drives the EVM.
Trademarks J of part 15 of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of this equipment in other environments may cause interference with radio communications, in which case the user at his own expense will be required to take whatever measures may be required to correct this interference. Trademarks Windows is a trademark of Microsoft Corporation. All other trademarks are the property of their respective owners.
Contents Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 2 Quick Start-Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1 3 Theory of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1 Photographs of EVM . . . . . .
Contents 4.5 4.6 4.4.16 Format Control Button . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-6 4.4.17 Normal Mode and USB Mode Radio Buttons . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-6 4.4.18 Clock Select Button . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-7 4.4.19 Frequency Display Areas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 1 Introduction The TLV320AIC23 EVM2 is designed to demonstrate the TLV320AIC23 codec or TLV320DAC23 DAC. With the use of the DAREF106R2 parallel port interface board, the user can control the EVM with a PC. The supplied software allows the user to change items such as volume, sample rate, power-down modes, and audio format on the fly. The user can also change the path of the audio using the GUI. The user can view all the registers and their values and change the values using the GUI.
1-2
Chapter 2 Quick Start-Up This section explains to the user how to set up the TLV320AIC23 EVM2 quickly and hear audio using digital loopback. 1) Set the jumpers for the appropriate conditions as explained in Section 3.2 2) Power up the AIC23 (PJ1) per Section 3.3 3) Connect audio source (e.g., CD player) LINEIN (J1). 4) Connect speaker or headphone to J4. 5) Connect the parallel port interface board to the PC parallel port and, via the supplied cable, the miniDIN 8-pin jack, J5.
2-2
Chapter 3 Theory of Operation This section provides a comprehensive description and explanation of the various features of the TLV320AIC23 EVM2. Topic Page 3.1 Photographs of EVM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3 3.2 Jumper Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-6 3.3 TLV320AIC23 EVM2 Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-6 3.
Figure 3–1.
Photographs of EVM 3.1 Photographs of EVM Figure 3–2.
Photographs of EVM Figure 3–3.
Photographs of EVM Figure 3–4. Parallel Port Interface Board Top View Figure 3–5.
Jumper Settings 3.2 Jumper Settings There are two jumpers on the EVM. - JP1 is used to select the communication mode of the EVM. Position 1–2 sets the mode for SPI. Position 2–3 sets the mode for I2C. The GUI software was developed for I2C communication. For SPI the end-user needs to create the necessary code. Signals needed for SPI are available on the EVM. - JP2 is used to select or deselect the onboard crystal for MASTER CLOCK.
Digital I/O 3.5 Digital I/O A protected header, J7, is available for interfacing with external digital I/O. Two power sources, 5 V and 3.3 V, are available on J7 for powering external boards. The 5-V power is tapped directly off PJ1. The 3.3-V power can supply up to 100 mA. Signal J7 5v_DIO (5.0 VDC) 1, 2 VCC_DIO (3.0 VDC) 5, 6 DIN 9 DOUT 11 BCLK 13 LRCIN 15 LRCOUT 17 MCLK 19 DIGITAL GROUND 3, 4, 7, 8, 10, 12, 14, 16, 18, 20 3.6 TLV320AIC23 EVM2 Features 3.6.
3-8
Chapter 4 Software This section describes the use of the DASCCT_AIC23 software GUI interface to control the TLV320AIC23 EVM2 board. Pictures of the various interface panels are shown, and explanations of the control and display elements on each are provided. Topic Page 4.1 DASCCT_AIC23 Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2 4.2 DASCCT_AIC23 Start-Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-4 4.
DASCCT_AIC23 Installation 4.1 DASCCT_AIC23 Installation Before running the DASCCT_AIC23 software, the parallel port must be configured for enhanced parallel port (EPP). The parallel port configuration can be changed in the system setup during system boot up. Some computers have a bidirectional mode, which also works. (Some have PS2, which may also work.) The connection diagram for the equipment is Figure 4–1. 1) Insert the software CD labeled DASCCT_AIC23 1.0 into the CD-ROM drive of the PC.
DASCCT_AIC23 Installation Figure 4–1.
DASCCT_AIC23 Start-Up 4.2 DASCCT_AIC23 Start-Up 1) Execute the software file named DASCCT_AIC23.exe from the directory where the software was loaded. 2) Click the Master or Slave radio button to select the operating mode. 3) Click the AIC 23 or DAC 23 radio button to select the device. 4.3 DASCCT_AIC23 Overview The EQ GUI was designed with a screen resolution of 1152 by 864. Therefore, the windows optimally fit on the screen using this resolution.
Main Panel 4.4.4 Message Area Directly below the Master and Slave radio buttons on the left side of the main panel is a message area. Short text instructions to the operator, status indications, or error messages can appear in this box. A listing of possible error messages appears in Chapter 5, along with an explanation of the errors. 4.4.5 Line Input Volume The line input volume section of the main panel consists of two identical boxes, one each for the left and right input channels.
Main Panel 4.4.9 I2C Adjust Button Pressing this button opens a panel that allows adjustment of the timing period used for I2C communications between the PC and the EVM. See Section 4.5. 4.4.10 I2C Bypass Check Box This check box allows the user to run the software without a device connected to the parallel port. 4.4.11 DataLog On Check Box This check box allows the user to record the information sent over I2C. The data is always stored in a file called DataLog.txt.
I2C Adjust 4.4.18 Clock Select Button Clicking the Clock Select button opens a panel that allows selection of master clock speed and ADC and DAC sampling rates (see Section 4.6.11). (Do clock selections correspond to sampling rate register bits?) 4.4.19 Frequency Display Areas In the lower right corner of the main panel are two frequency displays. The one on the left shows the master clock frequency MCLK in megaHertz; the one on the right shows the DAC sampling frequency in kiloHertz. 4.
I2C Adjust 4.6 View Registers The registers panel, shown in Figure 4–4, displays the bits for 10 registers, where the user can either view or change the bit values. There is a Preset Modes section of the panel, which allows the user to call up any of three sets of default register settings. A section with OK, Apply, and Cancel buttons completes the registers panel. The various functions are discussed individually in the following sections. Figure 4–4. Register GUI 4.6.
I2C Adjust Figure 4–5.
L Vol (HeadPhone) Register 4.6.2 L Vol (Line Input) Register Address: 0000000 D4–D0 set the left line input volume. D8 sets simultaneous right/left volume/mute. D7 sets the left input mute. Setting the bit values in this register is functionally equivalent to operating the Line Input Volume Left controls on the main panel (see Section 4.4.5). 4.6.3 R Vol (Line Input) Register Address: 0000001 D4–D0 set the right line input volume. D8 sets simultaneous right/left volume/mute.
Audio (Digital) Register D7–D6 set the sidetone attenuation (00 = –6 dB, 01 = –9 dB, 10 = –12 dB, 11 = –15 dB). D5 sets sidetone enable (0 = disabled, 1 = enabled). D4 sets the DAC select (0 = DAC off, 1 = DAC selected). D3 sets the bypass (0 = disabled, 1 = enabled). D2 sets the input for the ADC (0 = line, 1 = microphone). D1 sets the microphone mute (0 = normal, 1 = muted). D0 sets the microphone boost (0 = 0 db, 1 = 20 dB).
Power Down Register The Apply button sends the current bit values shown on the Analog Control panel to the Audio (Digital) register section of the register panel. The OK button performs the same function as the Apply button and simultaneously closes the register panel. Figure 4–7. Digital Control 4.6.9 Power Down Register Address: 0000110 D7 sets the device power. D6 sets CLK. D5 sets the oscillator. D4 sets the outputs. D3 sets the DAC. D2 sets the ADC. D1 sets the microphone input.
Sampling Rate Register The Apply button sends the current bit values shown on the Analog Control panel to the Audio (Format) register section of the register panel. The OK button performs the same function as the Apply button and simultaneously closes the register panel. Figure 4–8. Format Control 4.6.11 Sampling Rate Register Address: 0001000 D7 sets the clock output divider (0 = MCLK, 1 = MCLK/2), D6 sets clock input divider (0 = MCLK, 1 = MCLK/2). D5–D2 set the SR3–SR0 bits.
Interface Activate Register Figure 4–9. Clock Setup 4.6.12 Interface Activate Register Address: 0001001 D0 activates the digital interface (0 = inactive, 1 = active). Clicking the Send Data button sends only the interface activation data without clicking the Apply button.
Chapter 5 I2C Error Messages The error messages are only visible during error conditions. The error messages are located just above the RESET button in the main panel. The first message to appear will be above the second message. For example, if an ACK error occurs first then it is displayed first and it is only displayed once. The software continues to send data to the device even with ACK and WAIT errors.
5-2
Chapter 6 Kit Contents This chapter contains a list of the contents of the TLV320AIC23 EVM2 kit and a bill of materials for the TLV320AIC23 EVM2 board. Topic Page 6.1 TLV320AIC23 EVM2 Kit Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2 6.2 Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TLV320AIC23 EVM2 Kit Contents 6.1 TLV320AIC23 EVM2 Kit Contents TLV320AIC23 EVM2 is shipped with the following: 1) TLV320AIC23 EVM2 evaluation module 2) DAREF106R2 parallel port interface board 3) TLV320AIC23 EVM2 CD.
Bill of Materials 6.2 Bill of Materials Description Qty. Part Number Mfr. Ref. Des. AND Gate, Single 2–Input Positive 1 SN74AHC1G08DBVR Texas Instruments AND2 AND Gate, Single 2–Input Positive 1 SN74AHCT1G08DBVR Texas Instruments AND1 Buffer/Driver, Dual w/3–State Outputs 3 SN74LVC2G241DCTR Texas Instruments U3, U4, U5 CAP 27PFD 50V CERM 0603 NPO 2 ECU–V1H270JCV Panasonic C13, C14 CAP 47PFD 50V CERM 0603 NPO 3 ECJ–1VC1H470J Panasonic C3, C5, C8 CAP .
Bill of Materials Description Qty. Part Number Mfr. Ref. Des. RES 3.3 OHM 1/8W 5% SMD 1206 9 ERJ–8RQJ3R3V Panasonic R11, R12, R13, R14, R15, R16, R19, R27, R29 RES 10.0 OHM 1/8W 1% SMD 1206 1 ERJ–8ENF10R0V Panasonic R17 RES 10 OHM 1W 5% SMD 2512 1 ERJ–1WY100U Panasonic R18 RES 49.9 OHM 1/16W 1% SMD 0603 1 ERJ–3EKF49R9V Panasonic R31 RES 49.9 OHM 1/8W 1% SMD 1206 1 ERJ–8ENF49R9V Panasonic R33 RES 499 OHM 1/16W 1% SMD 0603 1 ERJ–3EKF4990V Panasonic R26 RES 2.
Appendix AppendixAA Circuit Card and Schematic This appendix contains the following items for the TLV320AIC23 EVM2, in the order listed: 1) 2) 3) 4) Top silkscreen Copper layer 1 Copper layer 2 Schematic diagram
Thu Nov 29 10:48:53 2001
Thu Nov 29 10:46:27 2001
Thu Nov 29 10:47:13 2001
