Datasheet

TLV320AIC3105
SLAS513B FEBRUARY 2007 REVISED DECEMBER 2008 .........................................................................................................................................
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Page 0/Register 81: PGA_L to LEFT_LOP/M Volume Control Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 R/W 0 PGA_L Output Routing Control
0: PGA_L is not routed to LEFT_LOP/M
1: PGA_L is routed to LEFT_LOP/M
D6 D0 R/W 000 0000 PGA_L to LEFT_LOP/M Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 6
Page 0/Register 82: DAC_L1 to LEFT_LOP/M Volume Control Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 R/W 0 DAC_L1 Output Routing Control
0: DAC_L1 is not routed to LEFT_LOP/M.
1: DAC_L1 is routed to LEFT_LOP/M.
D6 D0 R/W 000 0000 DAC_L1 to LEFT_LOP/M Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 6
Page 0/Register 83: LINE2R to LEFT_LOP/M Volume Control Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 R/W 0 LINE2R Output Routing Control
0: LINE2R is not routed to LEFT_LOP/M
1: LINE2R is routed to LEFT_LOP/M
D6 D0 R/W 000 0000 LINE2R to LEFT_LOP/M Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 6
Page 0/Register 84: PGA_R to LEFT_LOP/M Volume Control Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 R/W 0 PGA_R Output Routing Control
0: PGA_R is not routed to LEFT_LOP/M
1: PGA_R is routed to LEFT_LOP/M
D6 D0 R/W 000 0000 PGA_R to LEFT_LOP/M Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 6
Page 0/Register 85: DAC_R1 to LEFT_LOP/M Volume Control Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 R/W 0 DAC_R1 Output Routing Control
0: DAC_R1 is not routed to LEFT_LOP/M.
1: DAC_R1 is routed to LEFT_LOP/M.
D6 D0 R/W 000 0000 DAC_R1 to LEFT_LOP/M Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 6
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