Computer Hardware Algorithm Standard User's Guide
Table Of Contents
- Table of Contents
- Preface
- 1 Overview
- 2 General Programming Guidelines
- 3 Algorithm Component Model
- 3.1 Interfaces and Modules
- 3.1.1 External Identifiers
- 3.1.2 Naming Conventions
- 3.1.3 Module Initialization and Finalization
- 3.1.4 Module Instance Objects
- 3.1.5 Design-Time Object Creation
- 3.1.6 Run-Time Object Creation and Deletion
- 3.1.7 Module Configuration
- 3.1.8 Example Module
- 3.1.9 Multiple Interface Support
- 3.1.10 Interface Inheritance
- 3.1.11 Summary
- 3.2 Algorithms
- 3.3 Packaging
- 3.1 Interfaces and Modules
- 4 Algorithm Performance Characterization
- 5 DSP-Specific Guidelines
- 6 Use of the DMA Resource
- 6.1 Overview
- 6.2 Algorithm and Framework
- 6.3 Requirements for the Use of the DMA Resource
- 6.4 Logical Channel
- 6.5 Data Transfer Properties
- 6.6 Data Transfer Synchronization
- 6.7 Abstract Interface
- 6.8 Resource Characterization
- 6.9 Runtime APIs
- 6.10 Strong Ordering of DMA Transfer Requests
- 6.11 Submitting DMA Transfer Requests
- 6.12 Device Independent DMA Optimization Guideline
- 6.13 C6xxx Specific DMA Rules and Guidelines
- 6.14 C55x Specific DMA Rules and Guidelines
- 6.15 Inter-Algorithm Synchronization
- A Rules and Guidelines
- B Core Run-Time APIs
- C Bibliography
- D Glossary
List of Figures
1-1 TMS320 DSP Algorithm Standard Elements ........................................................................... 10
1-2 DSP Software Architecture ................................................................................................ 13
2-1 Scratch vs Persistent Memory Allocation ............................................................................... 21
2-2 Data Memory Types ....................................................................................................... 22
3-1 Module Interface and Implementation ................................................................................... 26
3-2 Module Object Creation ................................................................................................... 29
3-3 Example Module Object ................................................................................................... 29
3-4 Example Implementation of IALG Interface ............................................................................. 33
4-1 Execution Timeline for Two Periodic Tasks ............................................................................ 42
5-1 Register Types .............................................................................................................. 46
6-1 Transfer Properties for a 1-D Frame ..................................................................................... 64
6-2 Frame Index and 2-D Transfer of N-1 Frames ......................................................................... 64
6 List of Figures SPRU352G – June 2005 – Revised February 2007
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