Computer Hardware Algorithm Standard User's Guide

Chapter 6
SPRU352G – June 2005 – Revised February 2007
Use of the DMA Resource
The direct memory access (DMA) controller performs asynchronously scheduled data
transfers in the background while the CPU continues to execute instructions. In this
chapter, we develop additional rules and guidelines for creating eXpressDSP-compliant
algorithms that utilize the DMA resources.
Topic .................................................................................................. Page
6.1 Overview .................................................................................. 62
6.2 Algorithm and Framework .......................................................... 62
6.3 Requirements for the Use of the DMA Resource ........................... 63
6.4 Logical Channel ........................................................................ 63
6.5 Data Transfer Properties ............................................................ 64
6.6 Data Transfer Synchronization ................................................... 64
6.7 Abstract Interface...................................................................... 65
6.8 Resource Characterization ......................................................... 66
6.9 Runtime APIs............................................................................ 67
6.10 Strong Ordering of DMA Transfer Requests ................................. 67
6.11 Submitting DMA Transfer Requests ............................................ 68
6.12 Device Independent DMA Optimization Guideline ......................... 68
6.13 C6xxx Specific DMA Rules and Guidelines ................................... 69
6.14 C55x Specific DMA Rules and Guidelines .................................... 70
6.15 Inter-Algorithm Synchronization ................................................. 71
SPRU352G – June 2005 – Revised February 2007 Use of the DMA Resource 61
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