Digital Signal Processor Product Preview

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TMS320C6454
Fixed-Point Digital Signal Processor
SPRS311A – APRIL 2006 – REVISED DECEMBER 2006
7.8.3.6 SYSCLK Status Register
The SYSCLK status register (SYSTAT) shows the status of the system clock (SYSCLK1). SYSTAT is
shown in Figure 7-29 and described in Table 7-38 .
31 16
Reserved
R-0
15 1 0
Reserved SYS1ON
R-0 R-1
LEGEND: R/W = Read/Write; R = Read only; - n = value after reset
Figure 7-29. SYSCLK Status Register [Hex Address: 029C 0150]
Table 7-38. SYSCLK Status Register Field Descriptions
Bit Field Value Description
31:1 Reserved 0 Reserved. The reserved bit location is always read as 0. A value written to this field has no effect.
0 SYS1ON SYSCLK1 on status.
0 SYSCLK1 is gated.
1 SYSCLK1 is on.
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