Stereo System User Manual

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4.18.2 PLL Registers Description(s)
TMS320C6727, TMS320C6726, TMS320C6722
Floating-Point Digital Signal Processors
SPRS268E – MAY 2005 – REVISED JANUARY 2007
Table 4-41 is a list of the PLL registers. For more information about these registers, see the
TMS320C672x DSP Software-Programmable Phase-Locked Loop (PLL) Controller Reference Guide
(literature number SPRU879).
Table 4-41. PLL Controller Registers
BYTE ADDRESS REGISTER NAME DESCRIPTION
0x4100 0000 PLLPID PLL controller peripheral identification register
0x4100 0100 PLLCSR PLL control/status register
0x4100 0110 PLLM PLL multiplier control register
0x4100 0114 PLLDIV0 PLL controller divider register 0
0x4100 0118 PLLDIV1 PLL controller divider register 1
0x4100 011C PLLDIV2 PLL controller divider register 2
0x4100 0120 PLLDIV3 PLL controller divider register 3
0x4100 0138 PLLCMD PLL controller command register
0x4100 013C PLLSTAT PLL controller status register
0x4100 0140 ALNCTL PLL controller clock align control register
0x4100 0148 CKEN Clock enable control register
0x4100 014C CKSTAT Clock status register
0x4100 0150 SYSTAT SYSCLK status register
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