Stereo System User Manual
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2.9 Pin Assignments
2.9.1 Pin Maps
SPI0_ENA
/I2C1_
SDA
SPI0_CLK
/I2C0_
SCL
DV
DD
V
SS
EM_RW
EM_RAS
V
SS
EM_BA[1]
EM_A[0]
V
SS
EM_A[3]
EM_A[5]
EM_A[7]
EM_A[9]
DV
DD
V
SS
DV
DD
EM_WE_
DQM[3]
EM_A[11]
EM_A[8]
EM_A[6]
EM_A[4]
EM_A[2]
EM_A[1]
EM_A[10]
EM_BA[0]
EM_CS[0]
EM_CS[2]
EM_OE
/I2C1_
SPI0_SCS
SCL
SIMO
SPI0_
DV
DD
AXR0[0]
SPI0_
SOMI
/I2C0_
SDA
AHCLKR2
EM_WAIT
UHPI_
HD[8]
HD[9]
UHPI_
HD[11]
UHPI_
HD[13]
UHPI_
DV
DD
HD[1]
UHPI_
UHPI_
HD[4]
HD[2]
UHPI_
HD[6]
UHPI_
HD[7]
UHPI_
EM_CLK
EM_CKE
DQM[1]
EM_WE_
EM_D[8]
DQM[2]
EM_WE_
HD[5]
UHPI_
DV
DD
HD[3]
UHPI_
HD[0]
UHPI_
UHPI_
HD[15]
UHPI_
HD[14]
HD[12]
UHPI_
HD[10]
UHPI_
DV
DD
DV
DD
ACLKR2
AXR0[1]
AXR0[2]AXR0[4]
AXR0[3]
AFSR2
DV
DD
V
SS
V
SS
CV
DD
CV
DD
CV
DD
CV
DD
V
SS
V
SS
DV
DD
EM_A[12]
EM_D[10]
EM_D[9]EM_D[11]
EM_D[12]
EM_D[24]
/UHPI_
HA[8]
HA[9]
EM_D[25]
/UHPI_
CV
DD
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
CV
DD
ACLKX2
AFSX2
/SPI1_
AXR0[5]
SCS
AXR0[6]
/SPI1_
ENA
V
SS
AXR0[7]
/SPI1_
CLK
HCNTL[1]
UHPI_
HINT
AMUTE2/
CV
DD
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
CV
DD
/UHPI_
HA[11]
EM_D[27]
HA[10]
EM_D[26]
/UHPI_
EM_D[13]
V
SS
EM_D[14]
EM_D[1]
EM_D[0]
EM_D[15]
DV
DD
HA[12]
EM_D[28]
/UHPI_
HA[13]
EM_D[29]
/UHPI_
V
SS
V
SS
V
SS
V
SS
V
SS
CV
DD
V
SS
CV
DD
/UHPI_
HA[14]
EM_D[30]
V
SS
CV
DD
CV
DD
V
SS
CV
DD
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
CV
DD
V
SS
CV
DD
V
SS
CV
DD
V
SS
V
SS
V
SS
CV
DD
CV
DD
CV
DD
CV
DD
V
SS
V
SS
DV
DD
DV
DD
DV
DD
DV
DD
DV
DD
V
SS
EM_D[2]
HA[0]
EM_D[16]
/UHPI_
HA[15]
EM_D[31]
/UHPI_
EM_D[3]
EM_D[4]
HA[1]
EM_D[17]
/UHPI_
HA[2]
EM_D[18]
/UHPI_
EM_D[5]
EM_D[6]
HA[3]
EM_D[19]
/UHPI_
EM_D[7]
EM_WE_
DQM[0]
HA[4]
EM_D[20]
/UHPI_
HA[6]
EM_D[22]
/UHPI_
HD[29]
UHPI_
TRST
OSCV
DD
HD[31]
UHPI_
HD[18]
UHPI_
UHPI_
HD[20]
HRDY
UHPI_
HDS[1]
UHPI_
HRW
UHPI_
HCNTL[0]
UHPI_
HBE[2]
UHPI_
HBE[1]
UHPI_
HBE[0]
UHPI_
HDS[2]
UHPI_
HCS
UHPI_
HAS
UHPI_
AXR0[8]
/AXR1[5]
/SPI1_
SOMI
SIMO
/SPI1_
/AXR1[4]
AXR0[9]
/AXR1[3]
AXR0[10]
/AXR1[2]
AXR0[11]
/AXR1[1]
AXR0[12]
V
SS
/AXR2[1]
AXR0[14]
/AXR1[0]
AXR0[13]
/AXR2[0]
AXR0[15]
ACLKR0
AFSR0
ACLKX0
EM_WE
EM_CAS
HA[5]
EM_D[21]
/UHPI_
HD[26]
UHPI_
HD[27]
UHPI_
HD[28]
UHPI_
TMS
OSCOUT
V
SS
UHPI_
HD[17]
HD[19]
UHPI_
HD[21]
UHPI_
HD[22]
UHPI_
HD[23]
UHPI_
/AHCLKR1
AHCLKR0
AFSX0
DV
DD
DV
DD
DV
DD
V
SS
V
SS
DV
DD
HBE[3]
UHPI_
/AHCLKX2
AHCLKX0
AMUTE1
ACLKX1
AFSX1
RESET
CLKIN
OSCIN
PLLHV
HD[30]
UHPI_
TDO
HD[25]
UHPI_
HD[24]
UHPI_
HA[7]
EM_D[23]
/UHPI_
TCK
EMU[1]
EMU[0]
TDI
V
SS
OSCV
SS
HD[16]
/HHWIL
UHPI_
V
SS
AFSR1
ACLKR1
AHCLKX1
AMUTE0
T
R
P
N
M
L
K
J
H
G
F
E
D
C
B
A
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
TMS320C6727, TMS320C6726, TMS320C6722
Floating-Point Digital Signal Processors
SPRS268E – MAY 2005 – REVISED JANUARY 2007
Figure 2-8 and Figure 2-9 show the pin assignments on the 256-terminal GDH/ZDH package and the
144-pin RFP package, respectively.
Figure 2-8. 256-Terminal Ball Grid Array (GDH/ZDH Suffix)—Bottom View
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