Stereo System User Manual

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SPIx_CLK
SPI_SIMO
SPI_SOMI
SPIx_CLK
SPI_SIMO
SPI_SOMI
SPIx_CLK
SPI_SIMO
SPI_SOMI
SPIx_CLK
SPI_SIMO
SPI_SOMI
MO(0) MO(1) MO(n−1) MO(n)
MI(0) MI(1) MI(n−1) MI(n)
MO(0) MO(1) MO(n−1) MO(n)
MI(0) MI(1) MI(n−1) MI(n)
MO(0) MO(1) MO(n−1) MO(n)
MI(0) MI(1) MI(n−1) MI(n)
MO(0) MO(1) MO(n−1) MO(n)
MI(0) MI(1) MI(n−1) MI(n)
6
6
7
7
7
7
8
8
8
8
32
6
1
4
4
4
4
5
5
5
6
MASTER MODE
POLARITY = 0 PHASE = 0
MASTER MODE
POLARITY = 0 PHASE = 1
MASTER MODE
POLARITY = 1 PHASE = 0
MASTER MODE
POLARITY = 1 PHASE = 1
5
TMS320C6727, TMS320C6726, TMS320C6722
Floating-Point Digital Signal Processors
SPRS268E – MAY 2005 – REVISED JANUARY 2007
Figure 4-33. SPI Timings—Master Mode
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