Stereo System User Manual

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SPIx_CLK
SPI_SIMO
SPI_SOMI
SPIx_CLK
SPI_SIMO
SPI_SOMI
SPIx_CLK
SPI_SIMO
SPI_SOMI
SPIx_CLK
SPI_SIMO
SPI_SOMI
SI(0) SI(1) SI(n−1) SI(n)
SO(0) SO(1) SO(n−1) SO(n)
SI(0) SI(1) SI(n−1) SI(n)
SO(0) SO(1) SO(n−1) SO(n)
SI(0) SI(1) SI(n−1) SI(n)
SO(0) SO(1) SO(n−1) SO(n)
SI(0) SI(1) SI(n−1) SI(n)
SO(0) SO(1) SO(n−1) SO(n)
14
14
15
15
15
15
16
16
16
16
1110
14
9
12
12
12
12
13
13
13
13
14
SLAVE MODE
POLARITY = 0 PHASE = 0
SLAVE MODE
POLARITY = 0 PHASE = 1
SLAVE MODE
POLARITY = 1 PHASE = 0
SLAVE MODE
POLARITY = 1 PHASE = 1
TMS320C6727, TMS320C6726, TMS320C6722
Floating-Point Digital Signal Processors
SPRS268E – MAY 2005 – REVISED JANUARY 2007
Figure 4-34. SPI Timings—Slave Mode
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