Stereo System User Manual

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4.15.3 I2C Electrical Data/Timing
TMS320C6727, TMS320C6726, TMS320C6722
Floating-Point Digital Signal Processors
SPRS268E – MAY 2005 – REVISED JANUARY 2007
4.15.3.1 Inter-Integrated Circuit (I2C) Timing
Table 4-34 and Table 4-35 assume testing over recommended operating conditions (see Figure 4-38 and
Figure 4-39 ).
Table 4-34. I2C Input Timing Requirements
NO. MIN MAX UNIT
Standard Mode 10
1 t
c(SCL)
Cycle time, I2Cx_SCL µ s
Fast Mode 2.5
Standard Mode 4.7
Setup time, I2Cx_SCL high before I2Cx_SDA
2 t
su(SCLH-SDAL)
µ s
low
Fast Mode 0.6
Standard Mode 4
3 t
h(SCLL-SDAL)
Hold time, I2Cx_SCL low after I2Cx_SDA low µ s
Fast Mode 0.6
Standard Mode 4.7
4 t
w(SCLL)
Pulse duration, I2Cx_SCL low µ s
Fast Mode 1.3
Standard Mode 4
5 t
w(SCLH)
Pulse duration, I2Cx_SCL high µ s
Fast Mode 0.6
Standard Mode 250
6 t
su(SDA-SCLH)
Setup time, I2Cx_SDA before I2Cx_SCL high ns
Fast Mode 100
Standard Mode 0
7 t
h(SDA-SCLL)
Hold time, I2Cx_SDA after I2Cx_SCL low µ s
Fast Mode 0 0.9
Standard Mode 4.7
8 t
w(SDAH)
Pulse duration, I2Cx_SDA high µ s
Fast Mode 1.3
Standard Mode 1000
9 t
r(SDA)
Rise time, I2Cx_SDA ns
Fast Mode 20 + 0.1C
b
300
Standard Mode 1000
10 t
r(SCL)
Rise time, I2Cx_SCL ns
Fast Mode 20 + 0.1C
b
300
Standard Mode 300
11 t
f(SDA)
Fall time, I2Cx_SDA ns
Fast Mode 20 + 0.1C
b
300
Standard Mode 300
12 t
f(SCL)
Fall time, I2Cx_SCL ns
Fast Mode 20 + 0.1C
b
300
Standard Mode 4
Setup time, I2Cx_SCL high before I2Cx_SDA
13 t
su(SCLH-SDAH)
µ s
high
Fast Mode 0.6
Standard Mode N/A
14 t
w(SP)
Pulse duration, spike (must be suppressed) ns
Fast Mode 0 50
Standard Mode 400
15 C
b
Capacitive load for each bus line pF
Fast Mode 400
Table 4-35. I2C Switching Characteristics
(1)
NO. PARAMETER MIN MAX UNIT
Standard Mode 10
16 t
c(SCL)
Cycle time, I2Cx_SCL µ s
Fast Mode 2.5
Standard Mode 4.7
Setup time, I2Cx_SCL high before I2Cx_SDA
17 t
su(SCLH-SDAL)
µ s
low
Fast Mode 0.6
Standard Mode 4
18 t
h(SDAL-SCLL)
Hold time, I2Cx_SCL low after I2Cx_SDA low µ s
Fast Mode 0.6
(1) I2C must be configured correctly to meet the timings in Table 4-35 .
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