Stereo System User Manual

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10
8
4
3
7
12
5
6
14
2
3
13
Stop Start Repeated
Start
Stop
I2Cx_SDA
I2Cx_SCL
1
11 9
25
23
19
18
22
27
20
21
17
18
28
Stop Start Repeated
Start
Stop
I2Cx_SDA
I2Cx_SCL
16
26 24
TMS320C6727, TMS320C6726, TMS320C6722
Floating-Point Digital Signal Processors
SPRS268E – MAY 2005 – REVISED JANUARY 2007
Table 4-35. I2C Switching Characteristics (continued)
NO. PARAMETER MIN MAX UNIT
Standard Mode 4.7
19 t
w(SCLL)
Pulse duration, I2Cx_SCL low µ s
Fast Mode 1.3
Standard Mode 4
20 t
w(SCLH)
Pulse duration, I2Cx_SCL high µ s
Fast Mode 0.6
Standard Mode 250
Setup time, I2Cx_SDA valid before I2Cx_SCL
21 t
su(SDAV-SCLH)
ns
high
Fast Mode 100
Standard Mode 0
22 t
h(SCLL-SDAV)
Hold time, I2Cx_SDA valid after I2Cx_SCL low µ s
Fast Mode 0 0.9
Standard Mode 4.7
23 t
w(SDAH)
Pulse duration, I2Cx_SDA high µ s
Fast Mode 1.3
Standard Mode 4
Setup time, I2Cx_SCL high before I2Cx_SDA
28 t
su(SCLH-SDAH)
µ s
high
Fast Mode 0.6
Standard Mode 10
Capacitive load on each bus line from this
29 C
b
pF
device
Fast Mode 10
Figure 4-38. I2C Receive Timings
Figure 4-39. I2C Transmit Timings
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