Universal Serial Bus OHCI Host Controller User's Guide

2.5 OHCI Interrupts
2.6 USB Host Controller Access to System Memory
2.7 Physical Addressing
Processor
physical
address
Processor
virtual
address
Processor
MMU
00000000h
FFFFFFFFh
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The USB1 host controller can be controlled either by the ARM or the DSP. It has the ability to interrupt
either processor.
The USB1 module needs to access system memory to read and write the OHCI data structures and data
buffers associated with USB traffic. The switch fabric allows the USB host controller to access system
memory, as shown in .
Transactions on the internal bus use physical addresses, so all system memory accesses initiated by the
USB host controller must use physical addresses. The ARM CPU can be configured to use virtual
addressing. In this case, ARM side software manipulates virtual addresses that may or may not be
identical to physical addresses. When virtual addressing is used, system software must perform the
appropriate virtual address to physical address and physical address to virtual address conversions when
manipulating the USB host controllers data structures and pointers to those data structures.
Figure 1 shows the ARM virtual address to physical address conversion.
Figure 1. Relationships Between Virtual Address Physical Address
SPRUFM8 – September 2008 Universal Serial Bus OHCI Host Controller 11
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