Digital Media System-on-Chip (DMSoC) Product Preview

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EM_CE[1:0]
EM_BA[1:0]
13
12
EM_A[13:0]
EM_OE
EM_D[15:0]
EM_WE
10
5
9
7
4
8
6
3
1
EM_CE[1:0]
EM_BA[1:0]
EM_A[13:0]
EM_WE
EM_D[15:0]
EM_OE
15
1
16
18
20
22
24
17
19
21
23
26
27
TMS320DM355
Digital Media System-on-Chip (DMSoC)
SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007
Table 5-14. Switching Characteristics Over Recommended Operating Conditions for Asynchronous
Memory Cycles for AEMIF Module (see Figure 5-14 and Figure 5-15 ) (continued)
DM355
UNI
NO. PARAMETER
T
MIN Nom MAX
Output hold time, EM_WE high to
27 t
h(EMWEH-EMDIV)
(WH)*E ns
EM_D[15:0] invalid
Figure 5-14. Asynchronous Memory Read Timing for EMIF
Figure 5-15. Asynchronous Memory Write Timing for EMIF
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