Digital Media System-on-Chip (DMSoC) Product Preview

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1.3 Functional Block Diagram
Peripherals
64bitDMA/DataBus
JTAG
24MHz 27MHz
(optional)
CCD/
CMOS
Module
DDR2/MDDR16
CLOCK
PLL
CLOCKctrl
PLLs
JTA
JTAG
I/F
Clocks
ARM
z )
ARM926EJ-S_Z8
I-
cach
e
16 K
B
l-cache
16KB
B
RA
M
32 K
B
RAM
32KB
B
D-
cach
e
8K
D-cache
8KB
RO
M
8 K
ROM
8KB
CCD
C
CCDC
3A
3A
DMA / Dataandconfigurationbus
DMA/Dataandconfigurationbus
DDR
MH
z )
DDR
controller
DL
DLL/
PHY
16bit
32bitConfigurationBus
IPIP
E
IPIPE
VPBE
Vide
o
Encod
er
Video
Encoder
10b
DAC
OS
D
OSD
er
c
ARM
ARMINTC
Enhanced
channels
3PCC /TC
(100 MHz
EnhancedDMA
64channels
Compositevideo
DigitalRGB/YUV
Nand /
Nand/SM/
Async/OneNand
(EMIF2.3)
USB 2 .0
USB2.0PHY
Speaker
microphone
LD /
ASP (2x)
LD/CM
B
ufferLogic
VPSS
MMC/SD(x2)
SPII/F(x3)
UART (x3)
I2C
Timer/
WDT (x4-64)
GIO
PWM(x4)
RTO
VPFE
Enhanced
channels
3PCC /TC
(100 MHz
MPEG/JPEG
Coprocessor
TMS320DM355
Digital Media System-on-Chip (DMSoC)
SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007
Figure 1-1 shows the functional block diagram of the DM355 device.
Figure 1-1. Functional Block Diagram
TMS320DM355 Digital Media System-on-Chip (DMSoC)4 Submit Documentation Feedback