Digital Media System-on-Chip (DMSoC) Product Preview

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PRODUCT PREVIEW
TMS320DM355
Digital Media System-on-Chip (DMSoC)
SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007
Table 2-23. DM355 Pin Descriptions (continued)
Name BGA Type Group Power PU Reset Description
(4)
Mux Control
ID
(1)
Supply
(2)
PD
(3)
State
COUT5-G2 / C1 I/O VENC V
DD_VOUT
in Digital Video Out: VENC settings determine PINMUX1[5:4].COU
GIO079 / / GIO / function T_5
PWM2A / RTO0 PWM2
/ RTO
GIO: GIO[079]
PWM2A
RTO0
(4)
COUT4-B7 / D3 I/O VENC V
DD_VOUT
in Digital Video Out: VENC settings determine PINMUX1[7:6].COU
GIO078 / / GIO / function T_4
PWM2B / RTO1 PWM2
/ RTO
GIO: GIO[078]
PWM2B
RTO1
(4)
COUT3-B6 / E3 I/O VENC V
DD_VOUT
in Digital Video Out: VENC settings determine PINMUX1[9:8].COU
GIO077 / / GIO / function T_3
PWM2C / RTO2 PWM2
/ RTO
GIO: GIO[077]
PWM2C
RTO2
(4)
COUT2-B5 / E4 I/O VENC V
DD_VOUT
in Digital Video Out: VENC settings determine PINMUX1[11:10].CO
GIO076 / / GIO / function UT_2
PWM2D / RTO3 PWM2
/ RTO
GIO: GIO[076]
PWM2D
RTO3
(4)
COUT1-B4 / F3 I/O VENC V
DD_VOUT
in Digital Video Out: VENC settings determine PINMUX1[13:12].CO
GIO075 / / GIO / function UT_1
PWM3A PWM3
GIO: GIO[075]
PWM3A
(4)
COUT0-B3 / F4 I/O VENC V
DD_VOUT
in Digital Video Out: VENC settings determine PINMUX1[15:14].CO
GIO074 / / GIO / function UT_0
PWM3B PWM3
GIO: GIO[074]
PWM3B
(4)
HSYNC / F5 I/O VENC V
DD_VOUT
PD in Video Encoder: Horizontal Sync PINMUX1[16].HVSY
GIO073 / GIO NC
GIO: GIO[073]
(4)
VSYNC / G5 I/O VENC V
DD_VOUT
PD in Video Encoder: Vertical Sync PINMUX1[16].HVSY
GIO072 / GIO NC
GIO: GIO[072]
(4)
LCD_OE / H5 I/O VENC V
DD_VOUT
in Video Encoder: LCD Output Enable or PINMUX1[17].DLCD
GIO071 / GIO BRIGHT signal
GIO: GIO[071]
(4)
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