Digital Media System-on-Chip (DMSoC) Product Preview

www.ti.com
PRODUCT PREVIEW
TMS320DM355
Digital Media System-on-Chip (DMSoC)
SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007
Table 2-23. DM355 Pin Descriptions (continued)
Name BGA Type Group Power PU Reset Description
(4)
Mux Control
ID
(1)
Supply
(2)
PD
(3)
State
EM_D09 / K18 I/O AEMI V
DD
in Async EMIF: Data Bus bit[09] PINMUX2[4].EM_D1
GIO047 F / 5_8,
GIO
GIO: GIO[047] default set by
AECFG[3]
EM_D08 / L16 I/O AEMI V
DD
in Async EMIF: Data Bus bit[08] PINMUX2[4].EM_D1
GIO046 F / 5_8,
GIO
GIO: GIO[046] default set by
AECFG[3]
EM_D07 / K19 I/O AEMI V
DD
in Async EMIF: Data Bus bit[07] PINMUX2[5].EM_D7
GIO045 F / _0
GIO
GIO: GIO[045]
EM_D06 / K17 I/O AEMI V
DD
in Async EMIF: Data Bus bit[06] PINMUX2[5].EM_D7
GIO044 F / _0
GIO
GIO: GIO[044]
EM_D05 / J19 I/O AEMI V
DD
in Async EMIF: Data Bus bit[05] PINMUX2[5].EM_D7
GIO043 F / _0
GIO
GIO: GIO[043]
EM_D04 / L15 I/O AEMI V
DD
in Async EMIF: Data Bus bit[04] PINMUX2[5].EM_D7
GIO042 F / _0
GIO
GIO: GIO[042]
EM_D03 / J18 I/O AEMI V
DD
in Async EMIF: Data Bus bit[03] PINMUX2[5].EM_D7
GIO041 F / _0
GIO
GIO: GIO[041]
EM_D02 / H19 I/O AEMI V
DD
in Async EMIF: Data Bus bit[02] PINMUX2[5].EM_D7
GIO040 F / _0
GIO
GIO: GIO[040]
EM_D01 / J17 I/O AEMI V
DD
in Async EMIF: Data Bus bit[01] PINMUX2[5].EM_D7
GIO039 F / _0
GIO
GIO: GIO[039]
EM_D00 / H18 I/O AEMI V
DD
in Async EMIF: Data Bus bit[00] PINMUX2[5].EM_D7
GIO038 F / _0
GIO
GIO: GIO[038]
EM_CE0 / J16 I/O AEMI V
DD
out H Async EMIF: Lowest numbered Chip Select. PINMUX2[6].EM_CE
GIO037 F / Can be programmed to be used for standard 0
GIO asynchronous memories (example:flash),
OneNand or NAND memory. Used for the
default boot and ROM boot modes.
GIO: GIO[037]
EM_CE1 / G19 I/O AEMI V
DD
out H Async EMIF: Second Chip Select., Can be PINMUX2[7].EM_CE
GIO036 F / programmed to be used for standard 1
GIO asynchronous memories (example: flash),
OneNand or NAND memory.
GIO: GIO[036]
Device Overview46 Submit Documentation Feedback