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5.42 MAC Address Low Bytes Register (MACADDRLO)
5.43 MAC Address High Bytes Register (MACADDRHI)
Ethernet Media Access Controller (EMAC) Registers
The MAC address low bytes register used in address matching (MACADDRLO), is shown in Figure 68
and described in Table 67 .
Figure 68. MAC Address Low Bytes Register (MACADDRLO)
31 16
Reserved
R-0
15 8 7 0
MACADDR0 MACADDR1
R/W-0 R/W-0
LEGEND: R = Read only; R/W = Read/Write; - n = value after reset
Table 67. MAC Address Low Bytes Register (MACADDRLO) Field Descriptions
Bit Field Value Description
31-16 Reserved 0 Reserved
15-8 MACADDR0 0-FFh MAC address lower 8 bits (byte 0)
7-0 MACADDR1 0-FFh MAC address bits 15-8 (byte 1)
The MAC address high bytes register (MACADDRHI) is shown in Figure 69 and described in Table 68 .
Figure 69. MAC Address High Bytes Register (MACADDRHI)
31 24 23 16
MACADDR2 MACADDR3
R/W-0 R/W-0
15 8 7 0
MACADDR4 MACADDR5
R/W-0 R/W-0
LEGEND: R/W = Read/Write; - n = value after reset
Table 68. MAC Address High Bytes Register (MACADDRHI) Field Descriptions
Bit Field Value Description
31-24 MACADDR2 0-FFh MAC source address bits 23-16 (byte 2)
23-16 MACADDR3 0-FFh MAC source address bits 31-24 (byte 3)
15-8 MACADDR4 0-FFh MAC source address bits 39-32 (byte 4)
7-0 MACADDR5 0-FFh MAC source address bits 47-40 (byte 5). Bit 40 is the group bit. It is forced to 0 and read as 0.
Therefore, only unicast addresses are represented in the address table.
104 Ethernet Media Access Controller (EMAC)/ SPRU941A – April 2007
Management Data Input/Output (MDIO)
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