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5.44 MAC Index Register (MACINDEX)
Ethernet Media Access Controller (EMAC) Registers
The MAC index register (MACINDEX) is shown in Figure 70 and described in Table 69 .
Figure 70. MAC Index Register (MACINDEX)
31 16
Reserved
R-0
15 3 2 0
Reserved MACINDEX
R-0 R/W-0
LEGEND: R = Read only; R/W = Read/Write; - n = value after reset
Table 69. MAC Index Register (MACINDEX) Field Descriptions
Bit Field Value Description
31-3 Reserved 0 Reserved
2-0 MACINDEX 0-7h MAC address index. All eight addresses share the upper 40 bits. Only the lower byte is unique for each
address. An address is written by first writing the address number (channel) into the MACINDEX
register. The upper 32 bits of the address are then written to the MACADDRHI register, which is
followed by writing the lower 16 bits of the address to the MACADDRLO register. Since all eight
addresses share the upper 40 bits of the address, the MACADDRHI register only needs to be written
the first time.
SPRU941A – April 2007 Ethernet Media Access Controller (EMAC)/ 105
Management Data Input/Output (MDIO)
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