User Guide

List of Tables
1 EMAC and MDIO Signals ................................................................................................. 14
2 Ethernet Frame Description ............................................................................................... 15
3 Basic Descriptor Description .............................................................................................. 17
4 Receive Frame Treatment Summary .................................................................................... 42
5 Middle of Frame Overrun Treatment .................................................................................... 43
6 Emulation Control .......................................................................................................... 52
7 EMAC Control Module Registers ......................................................................................... 53
8 EMAC Control Module Interrupt Control Register (EWCTL) Field Descriptions ................................... 53
9 EMAC Control Module Interrupt Timer Count Register (EWINTTCNT) Field Descriptions ....................... 54
10 Management Data Input/Output (MDIO) Registers .................................................................... 55
11 MDIO Version Register (VERSION) Field Descriptions ............................................................... 55
12 MDIO Control Register (CONTROL) Field Descriptions .............................................................. 56
13 PHY Acknowledge Status Register (ALIVE) Field Descriptions ..................................................... 57
14 PHY Link Status Register (LINK) Field Descriptions .................................................................. 57
15 MDIO Link Status Change Interrupt (Unmasked) Register (LINKINTRAW) Field Descriptions ................. 58
16 MDIO Link Status Change Interrupt (Masked) Register (LINKINTMASKED) Field Descriptions ................ 59
17 MDIO User Command Complete Interrupt (Unmasked) Register (USERINTRAW) Field Descriptions ........ 60
18 MDIO User Command Complete Interrupt (Masked) Register (USERINTMASKED) Field Descriptions ....... 61
19 MDIO User Command Complete Interrupt Mask Set Register (USERINTMASKSET) Field Descriptions ..... 62
20 MDIO User Command Complete Interrupt Mask Clear Register (USERINTMASKCLEAR) Field
Descriptions ................................................................................................................. 63
21 MDIO User Access Register 0 (USERACCESS0) Field Descriptions ............................................... 64
22 MDIO User PHY Select Register 0 (USERPHYSEL0) Field Descriptions .......................................... 65
23 MDIO User Access Register 1 (USERACCESS1) Field Descriptions ............................................... 66
24 MDIO User PHY Select Register 1 (USERPHYSEL1) Field Descriptions .......................................... 67
25 Ethernet Media Access Controller (EMAC) Registers ................................................................. 68
26 Transmit Identification and Version Register (TXIDVER) Field Descriptions ....................................... 71
27 Transmit Control Register (TXCONTROL) Field Descriptions ....................................................... 71
28 Transmit Teardown Register (TXTEARDOWN) Field Descriptions.................................................. 72
29 Receive Identification and Version Register (RXIDVER) Field Descriptions ....................................... 73
30 Receive Control Register (RXCONTROL) Field Descriptions ........................................................ 73
31 Receive Teardown Register (RXTEARDOWN) Field Descriptions .................................................. 74
32 Transmit Interrupt Status (Unmasked) Register (TXINTSTATRAW) Field Descriptions .......................... 75
33 Transmit Interrupt Status (Masked) Register (TXINTSTATMASKED) Field Descriptions ........................ 76
34 Transmit Interrupt Mask Set Register (TXINTMASKSET) Field Descriptions ...................................... 77
35 Transmit Interrupt Mask Clear Register (TXINTMASKCLEAR) Field Descriptions ................................ 78
36 MAC Input Vector Register (MACINVECTOR) Field Descriptions ................................................... 79
37 Receive Interrupt Status (Unmasked) Register (RXINTSTATRAW) Field Descriptions .......................... 80
38 Receive Interrupt Status (Masked) Register (RXINTSTATMASKED) Field Descriptions......................... 81
39 Receive Interrupt Mask Set Register (RXINTMASKSET) Field Descriptions ...................................... 82
40 Receive Interrupt Mask Clear Register (RXINTMASKCLEAR) Field Descriptions ................................ 83
41 MAC Interrupt Status (Unmasked) Register (MACINTSTATRAW) Field Descriptions ............................ 84
42 MAC Interrupt Status (Masked) Register (MACINTSTATMASKED) Field Descriptions .......................... 84
43 MAC Interrupt Mask Set Register (MACINTMASKSET) Field Descriptions ........................................ 85
44 MAC Interrupt Mask Clear Register (MACINTMASKCLEAR) Field Descriptions .................................. 85
45 Receive Multicast/Broadcast/Promiscuous Channel Enable Register (RXMBPENABLE) Field Descriptions . 86
46 Receive Unicast Enable Set Register (RXUNICASTSET) Field Descriptions ...................................... 89
47 Receive Unicast Clear Register (RXUNICASTCLEAR) Field Descriptions ......................................... 90
48 Receive Maximum Length Register (RXMAXLEN) Field Descriptions .............................................. 91
49 Receive Buffer Offset Register (RXBUFFEROFFSET) Field Descriptions ......................................... 91
8 List of Tables SPRU941A – April 2007
Submit Documentation Feedback