Video Port/VCXO Interpolated Control (VIC) Port User's Guide

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5
FLCOUNT
750
716
716
ILCOUNT
Field 1 Blanking
Field 1 Blanking
Field 1 Active
4
3
2
1
716
716
716
716
25
26
27
716
716
716
745
746
747
748
749
716
716
716
716
716
28
29
Field 1 Image
744
1
2
716
715
V F
01
01
01
01
01
01
01
00
00
00
01
01
01
01
716
EAV
00
00
00
00
00
6 716 01
750 716 01
Active
Horizontal
Output
Blanking Value
Blanking Value
Blanking Value
Blanking Value
Blanking Value
Blanking Value
Blanking Value
Blanking Value
Default Value
(B)
Default Value
(B)
Default Value
(B)
FIFO Data
FIFO Data
FIFO Data
FIFO Data
Default Value
(B)
Blanking Value
Blanking Value
Blanking Value
Blanking Value
Blanking Value
1
716
716
01
01
Blanking Value
Blanking Value
FLD
VBLNK
(A)(B)
VSYNC
(A)(B)
Display Timing Examples
The vertical output timing is shown in Figure 4-30 . SMPTE 296M has a single active field 1 that is
720-lines high. This example shows the 716-line image window with an IMGVOFF n of 3 lines and also
results in a non-data line at the end of the field.
The VBLNK and VSYNC signals are shown as they would be output for active-low operation. Note that
only one of the two signals is actually available externally. The VBLNK and VSYNC edges occur at the
end of an active line so their XSTART/XSTOP values are set to 1280 (start of blanking). The field 2
vertical timing start and stop registers are programmed to a value greater than 750. Since this value is
never reached by FLCOUNT, no extra VBLNK or VSYNC transitions occur. For true SMPTE 296M
operation, neither VBLNK nor VSYNC would be used.
The FLD output is setup to transition low at the start of each frame. Since the FLD2YSTART value is
never reached by FLCOUNT, the FLD output remains always low.
The ILCOUNT operation follows the description in Section 4.1.2 . ILCOUNT resets to 1 at the first
displayed line (FLCOUNT = VBLNKSTOP x + IMGVOFF n) and stops counting at the last displayed pixel
(IPCOUNT = IMGVSIZE x). The operation during non-display time is not a requirement, it could continue
counting until the next FLCOUNT = VBLNKSTOP x + IMGVOFF n point or it could reset immediately after
IMGVSIZE x or when FLCOUNT is reset.
The active horizontal output column shows the output data during the active portion of the horizontal line.
It is assumed that the DVEN bit in VDCTL is set to enable the default output.
Figure 4-30. Y/C Progressive Display Vertical Timing Example
A Assumes VCT1P bit in VPCTL is set to 1 (active-low output). VSYNC output when VCTL2S bit in VDCTL is set to 00,
VBLNK output when VCTL2S bit is set 01.
B If DVEN bit in VDCTL is set to 1; otherwise, blanking value is output
Video Display Port118 SPRUEM1 – May 2007
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