Video Port/VCXO Interpolated Control (VIC) Port User's Guide

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2.4.3 Video Port Interrupt Enable Register (VPIE)

Video Port Control Registers

The video port interrupt enable register (VPIE) enables sources of the video port interrupt to the DSP.

The video port interrupt enable register (VPIE) is shown in Figure 2-3 and described in Table 2-5 .

Figure 2-3. Video Port Interrupt Enable Register (VPIE)

31 24

Reserved

R-0

23 22 21 20 19 18 17 16

LFDB SFDB VINTB2 VINTB1 SERRB CCMPB COVRB GPIO

R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0

15 14 13 12 11 10 9 8

Reserved DCNA DCMP DUND TICK STC Reserved

R-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R-0

7 6 5 4 3 2 1 0

LFDA SFDA VINTA2 VINTA1 SERRA CCMPA COVRA VIE

R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0

LEGEND: R/W = Read/Write; R = Read only; - n = value after reset

Table 2-5. Video Port Interrupt Enable Register (VPIE) Field Descriptions

Bit field

(1)

symval

(1)

Value Description

31-24 Reserved - 0 Reserved. The reserved bit location is always read as 0. A value written to this field

has no effect.

23 LFDB OF( value) Long field detected on channel B interrupt enable bit.

DEFAULT 0 Interrupt is disabled.

DISABLE